LDj3SNuD c3e0c41da3

CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894)

2021-01-20 09:12:33 +11:00

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Assembler.cs

Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)

2020-12-17 20:43:41 +01:00

CallConvName.cs

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CallingConvention.cs

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CodeGenCommon.cs

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CodeGenContext.cs

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CodeGenerator.cs

Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)

2020-12-17 20:43:41 +01:00

HardwareCapabilities.cs

CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)

2020-11-18 19:35:54 +01:00

IntrinsicInfo.cs

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IntrinsicTable.cs

CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894)

2021-01-20 09:12:33 +11:00

IntrinsicType.cs

Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)

2020-12-07 10:37:07 +01:00

PreAllocator.cs

Fix pre-allocator shift instruction copy on a specific case (#1752)

2020-12-14 17:56:07 -03:00

X86Condition.cs

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X86Instruction.cs

Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)

2020-12-17 20:43:41 +01:00

X86Optimizer.cs

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X86Register.cs

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