Ryujinx

History

CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776 )

* Start implementation

* Draft

* Updated opcode.

Needs verification.

* Clean up code.

* Update implementation and tests.

* Update implemenation + tests

* Get RM from FPSCR + Do not use emit/addintrinsic

* Remove "fast" path, as recommended by gdk.

* Variable DELETED.

* Update ARMeilleure/Decoders/OpCodeTable.cs

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>

* Update ARMeilleure/Instructions/InstEmitSimdCvt32.cs

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>

* Update ARMeilleure/Instructions/InstEmitSimdCvt32.cs

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>

* Update ARMeilleure/Instructions/InstEmitSimdCvt32.cs

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>

* Move method

* stringing things together :)

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>

2020-12-16 20:27:15 -03:00

CodeGen

CPU: Implement VFMA (Vector) (#1762 )

2020-12-15 00:01:52 -03:00

Common

Clear JIT cache on exit (#1518 )

2020-12-16 17:07:42 -03:00

Decoders

CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776 )

2020-12-16 20:27:15 -03:00

Diagnostics

Implement block placement (#1549 )