mirror of
https://github.com/dolphin-emu/dolphin.git
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337 lines
8.2 KiB
C++
337 lines
8.2 KiB
C++
// Copyright 2013 Dolphin Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "Common/CPUDetect.h"
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#include <cstring>
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#include <fstream>
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#include <sstream>
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#include <string>
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#include <thread>
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#ifdef __APPLE__
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#include <sys/sysctl.h>
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#elif defined(_WIN32)
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#include <Windows.h>
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#include <arm64intr.h>
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#include "Common/WindowsRegistry.h"
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#elif defined(__linux__)
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#include <asm/hwcap.h>
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#include <sys/auxv.h>
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#elif defined(__FreeBSD__)
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#include <sys/auxv.h>
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#elif defined(__OpenBSD__)
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#include <machine/armreg.h>
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#include <machine/cpu.h>
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#include <sys/sysctl.h>
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#include <sys/types.h>
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#endif
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#include <fmt/format.h>
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#include "Common/CommonTypes.h"
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#include "Common/FileUtil.h"
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#include "Common/StringUtil.h"
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#if defined(__APPLE__) || defined(__FreeBSD__)
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static bool SysctlByName(std::string* value, const std::string& name)
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{
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size_t value_len = 0;
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if (sysctlbyname(name.c_str(), nullptr, &value_len, nullptr, 0))
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return false;
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value->resize(value_len);
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if (sysctlbyname(name.c_str(), value->data(), &value_len, nullptr, 0))
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return false;
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TruncateToCString(value);
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return true;
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}
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#endif
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#if defined(_WIN32)
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static constexpr char SUBKEY_CORE0[] = R"(HARDWARE\DESCRIPTION\System\CentralProcessor\0)";
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// Identifier: human-readable version of CPUID
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// ProcessorNameString: marketing name of the processor
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// VendorIdentifier: vendor company name
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// There are some other maybe-interesting values nearby, BIOS info etc.
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static bool ReadProcessorString(std::string* value, const std::string& name)
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{
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return WindowsRegistry::ReadValue(value, SUBKEY_CORE0, name);
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}
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// Read cached register values from the registry
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static bool ReadPrivilegedCPReg(u64* value, u32 reg)
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{
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// Not sure if the value name is padded or not
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return WindowsRegistry::ReadValue(value, SUBKEY_CORE0, fmt::format("CP {:x}", reg).c_str());
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}
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static bool Read_MIDR_EL1(u64* value)
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{
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return ReadPrivilegedCPReg(value, ARM64_SYSREG(0b11, 0, 0, 0b0000, 0));
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}
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static bool Read_ID_AA64ISAR0_EL1(u64* value)
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{
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return ReadPrivilegedCPReg(value, ARM64_SYSREG(0b11, 0, 0, 0b0110, 0));
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}
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static bool Read_ID_AA64MMFR1_EL1(u64* value)
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{
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return ReadPrivilegedCPReg(value, ARM64_SYSREG(0b11, 0, 0, 0b0111, 1));
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}
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#endif
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#if defined(__linux__)
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static bool ReadDeviceTree(std::string* value, const std::string& name)
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{
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const std::string path = std::string("/proc/device-tree/") + name;
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std::ifstream file;
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File::OpenFStream(file, path.c_str(), std::ios_base::in);
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if (!file)
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return false;
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file >> *value;
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return true;
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}
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static std::string ReadCpuinfoField(const std::string& field)
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{
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std::string line;
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std::ifstream file;
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File::OpenFStream(file, "/proc/cpuinfo", std::ios_base::in);
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if (!file)
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return {};
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while (std::getline(file, line))
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{
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if (!line.starts_with(field))
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continue;
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auto non_tab = line.find_first_not_of("\t", field.length());
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if (non_tab == line.npos)
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continue;
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if (line[non_tab] != ':')
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continue;
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auto value_start = line.find_first_not_of(" ", non_tab + 1);
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if (value_start == line.npos)
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continue;
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return line.substr(value_start);
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}
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return {};
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}
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static bool Read_MIDR_EL1_Sysfs(u64* value)
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{
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std::ifstream file;
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File::OpenFStream(file, "/sys/devices/system/cpu/cpu0/regs/identification/midr_el1",
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std::ios_base::in);
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if (!file)
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return false;
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file >> std::hex >> *value;
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return true;
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}
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#endif
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#if defined(__linux__) || defined(__FreeBSD__)
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static u32 ReadHwCap(u32 type)
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{
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#if defined(__linux__)
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return getauxval(type);
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#elif defined(__FreeBSD__)
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u_long hwcap = 0;
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elf_aux_info(type, &hwcap, sizeof(hwcap));
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return hwcap;
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#endif
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}
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// For "Direct" reads, value gets filled via emulation, hence:
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// "there is no guarantee that the value reflects the processor that it is currently executing on"
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// On big.LITTLE systems, the value may be unrelated to the core this is invoked on, and unless
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// other measures are taken, executing the instruction may cause the caller to be switched onto a
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// different core when it resumes (and of course, caller could be preempted at any other time as
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// well).
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static inline u64 Read_MIDR_EL1_Direct()
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{
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u64 value;
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__asm__ __volatile__("mrs %0, MIDR_EL1" : "=r"(value));
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return value;
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}
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static bool Read_MIDR_EL1(u64* value)
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{
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#ifdef __linux__
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if (Read_MIDR_EL1_Sysfs(value))
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return true;
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#endif
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bool id_reg_user_access = ReadHwCap(AT_HWCAP) & HWCAP_CPUID;
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#ifdef __FreeBSD__
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// FreeBSD kernel has support but doesn't seem to indicate it?
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// see user_mrs_handler
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id_reg_user_access = true;
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#endif
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if (!id_reg_user_access)
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return false;
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*value = Read_MIDR_EL1_Direct();
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return true;
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}
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#endif
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#if defined(_WIN32) || defined(__linux__) || defined(__FreeBSD__)
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static std::string MIDRToString(u64 midr)
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{
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u8 implementer = (midr >> 24) & 0xff;
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u8 variant = (midr >> 20) & 0xf;
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u8 arch = (midr >> 16) & 0xf;
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u16 part_num = (midr >> 4) & 0xfff;
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u8 revision = midr & 0xf;
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return fmt::format("{:02X}:{:X}:{:04b}:{:03X}:{:X}", implementer, variant, arch, part_num,
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revision);
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}
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#endif
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CPUInfo cpu_info;
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CPUInfo::CPUInfo()
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{
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Detect();
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}
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void CPUInfo::Detect()
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{
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vendor = CPUVendor::ARM;
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bFMA = true;
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bFlushToZero = true;
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num_cores = std::max(static_cast<int>(std::thread::hardware_concurrency()), 1);
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#ifdef __APPLE__
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SysctlByName(&model_name, "machdep.cpu.brand_string");
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// M-series CPUs have all of these
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// Apparently the world has accepted that these can be assumed supported "for all time".
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// see https://github.com/golang/go/issues/42747
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bAES = true;
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bSHA1 = true;
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bSHA2 = true;
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bCRC32 = true;
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#elif defined(_WIN32)
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// NOTE All this info is from cpu core 0 only.
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ReadProcessorString(&model_name, "ProcessorNameString");
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u64 reg = 0;
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// Attempt to be forward-compatible: perform inverted check against disabled feature states.
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if (Read_ID_AA64ISAR0_EL1(®))
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{
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bAES = ((reg >> 4) & 0xf) != 0;
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bSHA1 = ((reg >> 8) & 0xf) != 0;
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bSHA2 = ((reg >> 12) & 0xf) != 0;
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bCRC32 = ((reg >> 16) & 0xf) != 0;
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}
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if (Read_ID_AA64MMFR1_EL1(®))
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{
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// Introduced in Armv8.7, where AFP must be supported if AdvSIMD and FP both are.
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bAFP = ((reg >> 44) & 0xf) != 0;
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}
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// Pre-decoded MIDR_EL1 could be read with ReadProcessorString(.., "Identifier"),
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// but we want format to match across all platforms where possible.
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if (Read_MIDR_EL1(®))
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{
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cpu_id = MIDRToString(reg);
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}
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#elif defined(__linux__) || defined(__FreeBSD__)
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// Linux, Android, and FreeBSD
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#if defined(__FreeBSD__)
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SysctlByName(&model_name, "hw.model");
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#elif defined(__linux__)
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if (!ReadDeviceTree(&model_name, "model"))
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{
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// This doesn't seem to work on modern arm64 kernels
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model_name = ReadCpuinfoField("Hardware");
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}
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#endif
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const u32 hwcap = ReadHwCap(AT_HWCAP);
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bAES = hwcap & HWCAP_AES;
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bCRC32 = hwcap & HWCAP_CRC32;
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bSHA1 = hwcap & HWCAP_SHA1;
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bSHA2 = hwcap & HWCAP_SHA2;
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#if defined(AT_HWCAP2) && defined(HWCAP2_AFP)
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const u32 hwcap2 = ReadHwCap(AT_HWCAP2);
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bAFP = hwcap2 & HWCAP2_AFP;
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#endif
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u64 midr = 0;
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if (Read_MIDR_EL1(&midr))
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{
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cpu_id = MIDRToString(midr);
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}
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#elif defined(__OpenBSD__)
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// OpenBSD
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int mib[2];
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size_t len;
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char hwmodel[256];
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uint64_t isar0;
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mib[0] = CTL_HW;
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mib[1] = HW_MODEL;
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len = std::size(hwmodel);
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if (sysctl(mib, 2, &hwmodel, &len, nullptr, 0) != -1)
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model_name = std::string(hwmodel, len - 1);
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mib[0] = CTL_MACHDEP;
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mib[1] = CPU_ID_AA64ISAR0;
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len = sizeof(isar0);
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if (sysctl(mib, 2, &isar0, &len, nullptr, 0) != -1)
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{
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if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_BASE)
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bAES = true;
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if (ID_AA64ISAR0_SHA1(isar0) >= ID_AA64ISAR0_SHA1_BASE)
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bSHA1 = true;
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if (ID_AA64ISAR0_SHA2(isar0) >= ID_AA64ISAR0_SHA2_BASE)
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bSHA2 = true;
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if (ID_AA64ISAR0_CRC32(isar0) >= ID_AA64ISAR0_CRC32_BASE)
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bCRC32 = true;
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}
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#endif
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model_name = ReplaceAll(model_name, ",", "_");
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cpu_id = ReplaceAll(cpu_id, ",", "_");
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}
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std::string CPUInfo::Summarize()
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{
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std::vector<std::string> sum;
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sum.push_back(model_name);
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sum.push_back(cpu_id);
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if (bAFP)
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sum.push_back("AFP");
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if (bAES)
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sum.push_back("AES");
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if (bCRC32)
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sum.push_back("CRC32");
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if (bSHA1)
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sum.push_back("SHA1");
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if (bSHA2)
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sum.push_back("SHA2");
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return JoinStrings(sum, ",");
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}
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