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shader_decode: Implement F2F_C
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@ -67,13 +67,21 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, value);
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SetRegister(bb, instr.gpr0, value);
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break;
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break;
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}
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}
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case OpCode::Id::F2F_R: {
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case OpCode::Id::F2F_R:
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case OpCode::Id::F2F_C: {
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UNIMPLEMENTED_IF(instr.conversion.dest_size != Register::Size::Word);
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UNIMPLEMENTED_IF(instr.conversion.dest_size != Register::Size::Word);
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UNIMPLEMENTED_IF(instr.conversion.src_size != Register::Size::Word);
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UNIMPLEMENTED_IF(instr.conversion.src_size != Register::Size::Word);
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in F2F is not implemented");
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"Condition codes generation in F2F is not implemented");
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Node value = GetRegister(instr.gpr20);
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Node value = [&]() {
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if (instr.is_b_gpr) {
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return GetRegister(instr.gpr20);
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} else {
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
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}
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}();
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value = GetOperandAbsNegFloat(value, instr.conversion.abs_a, instr.conversion.negate_a);
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value = GetOperandAbsNegFloat(value, instr.conversion.abs_a, instr.conversion.negate_a);
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value = [&]() {
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value = [&]() {
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