emu-mirror/yuzu
1
0
Fork 0
mirror of https://github.com/yuzu-mirror/yuzu.git synced 2024-11-18 13:27:32 +01:00
Code Issues Packages Projects Releases Wiki Activity

shader_bytecode: Make ctor's constexpr and explicit.

Browse Source
This commit is contained in:
bunnei 2018-04-17 18:06:10 -04:00
parent e59126809c
commit 531c25386e
1 changed files with 7 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/video_core/engines/shader_bytecode.h
View File

@ -13,7 +13,7 @@ namespace Tegra {
namespace Shader { namespace Shader {
struct Register { struct Register {
Register() = default; constexpr Register() = default;
constexpr Register(u64 value) : value(value) {} constexpr Register(u64 value) : value(value) {}
@ -40,13 +40,13 @@ struct Register {
} }
private: private:
u64 value; u64 value{};
}; };
union Attribute { union Attribute {
Attribute() = default; Attribute() = default;
constexpr Attribute(u64 value) : value(value) {} constexpr explicit Attribute(u64 value) : value(value) {}
enum class Index : u64 { enum class Index : u64 {
Position = 7, Position = 7,
@ -65,20 +65,20 @@ union Attribute {
} fmt28; } fmt28;
BitField<39, 8, u64> reg; BitField<39, 8, u64> reg;
u64 value; u64 value{};
}; };
union Sampler { union Sampler {
Sampler() = default; Sampler() = default;
constexpr Sampler(u64 value) : value(value) {} constexpr explicit Sampler(u64 value) : value(value) {}
enum class Index : u64 { enum class Index : u64 {
Sampler_0 = 8, Sampler_0 = 8,
}; };
BitField<36, 13, Index> index; BitField<36, 13, Index> index;
u64 value; u64 value{};
}; };
union Uniform { union Uniform {
@ -248,7 +248,7 @@ union OpCode {
BitField<55, 9, Id> op3; BitField<55, 9, Id> op3;
BitField<52, 12, Id> op4; BitField<52, 12, Id> op4;
BitField<51, 13, Id> op5; BitField<51, 13, Id> op5;
u64 value; u64 value{};
}; };
static_assert(sizeof(OpCode) == 0x8, "Incorrect structure size"); static_assert(sizeof(OpCode) == 0x8, "Incorrect structure size");