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video_core: Reintroduce dirty flags infrastructure
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b92dfcd7f2
commit
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@ -174,6 +174,7 @@ struct System::Impl {
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}
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}
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interrupt_manager = std::make_unique<Core::Hardware::InterruptManager>(system);
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interrupt_manager = std::make_unique<Core::Hardware::InterruptManager>(system);
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gpu_core = VideoCore::CreateGPU(system);
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gpu_core = VideoCore::CreateGPU(system);
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renderer->Rasterizer().SetupDirtyFlags();
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is_powered_on = true;
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is_powered_on = true;
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exit_lock = false;
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exit_lock = false;
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@ -2,6 +2,7 @@ add_library(video_core STATIC
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buffer_cache/buffer_block.h
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buffer_cache/buffer_block.h
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buffer_cache/buffer_cache.h
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buffer_cache/buffer_cache.h
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buffer_cache/map_interval.h
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buffer_cache/map_interval.h
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dirty_flags.h
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dma_pusher.cpp
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dma_pusher.cpp
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dma_pusher.h
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dma_pusher.h
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engines/const_buffer_engine_interface.h
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engines/const_buffer_engine_interface.h
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28
src/video_core/dirty_flags.h
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28
src/video_core/dirty_flags.h
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@ -0,0 +1,28 @@
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// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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namespace VideoCommon::Dirty {
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enum : u8 {
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NullEntry = 0,
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RenderTargets,
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ColorBuffer0,
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ColorBuffer1,
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ColorBuffer2,
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ColorBuffer3,
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ColorBuffer4,
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ColorBuffer5,
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ColorBuffer6,
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ColorBuffer7,
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ZetaBuffer,
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LastCommonEntry,
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};
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} // namespace VideoCommon::Dirty
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@ -21,6 +21,9 @@ MICROPROFILE_DEFINE(DispatchCalls, "GPU", "Execute command buffer", MP_RGB(128,
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void DmaPusher::DispatchCalls() {
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void DmaPusher::DispatchCalls() {
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MICROPROFILE_SCOPE(DispatchCalls);
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MICROPROFILE_SCOPE(DispatchCalls);
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// On entering GPU code, assume all memory may be touched by the ARM core.
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gpu.Maxwell3D().OnMemoryWrite();
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dma_pushbuffer_subindex = 0;
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dma_pushbuffer_subindex = 0;
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while (Core::System::GetInstance().IsPoweredOn()) {
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while (Core::System::GetInstance().IsPoweredOn()) {
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@ -38,6 +38,9 @@ void KeplerCompute::CallMethod(const GPU::MethodCall& method_call) {
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case KEPLER_COMPUTE_REG_INDEX(data_upload): {
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case KEPLER_COMPUTE_REG_INDEX(data_upload): {
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const bool is_last_call = method_call.IsLastCall();
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const bool is_last_call = method_call.IsLastCall();
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upload_state.ProcessData(method_call.argument, is_last_call);
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upload_state.ProcessData(method_call.argument, is_last_call);
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if (is_last_call) {
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system.GPU().Maxwell3D().OnMemoryWrite();
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}
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break;
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break;
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}
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}
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case KEPLER_COMPUTE_REG_INDEX(launch):
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case KEPLER_COMPUTE_REG_INDEX(launch):
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@ -33,6 +33,9 @@ void KeplerMemory::CallMethod(const GPU::MethodCall& method_call) {
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case KEPLERMEMORY_REG_INDEX(data): {
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case KEPLERMEMORY_REG_INDEX(data): {
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const bool is_last_call = method_call.IsLastCall();
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const bool is_last_call = method_call.IsLastCall();
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upload_state.ProcessData(method_call.argument, is_last_call);
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upload_state.ProcessData(method_call.argument, is_last_call);
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if (is_last_call) {
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system.GPU().Maxwell3D().OnMemoryWrite();
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}
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break;
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break;
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}
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}
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}
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}
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@ -26,6 +26,8 @@ Maxwell3D::Maxwell3D(Core::System& system, VideoCore::RasterizerInterface& raste
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MemoryManager& memory_manager)
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MemoryManager& memory_manager)
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: system{system}, rasterizer{rasterizer}, memory_manager{memory_manager},
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: system{system}, rasterizer{rasterizer}, memory_manager{memory_manager},
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macro_interpreter{*this}, upload_state{memory_manager, regs.upload} {
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macro_interpreter{*this}, upload_state{memory_manager, regs.upload} {
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dirty.flags.flip();
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InitializeRegisterDefaults();
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InitializeRegisterDefaults();
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}
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}
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@ -158,7 +160,13 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid Maxwell3D register, increase the size of the Regs structure");
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"Invalid Maxwell3D register, increase the size of the Regs structure");
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regs.reg_array[method] = method_call.argument;
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if (regs.reg_array[method] != method_call.argument) {
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regs.reg_array[method] = method_call.argument;
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for (const auto& table : dirty.tables) {
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dirty.flags[table[method]] = true;
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}
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}
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switch (method) {
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switch (method) {
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case MAXWELL3D_REG_INDEX(macros.data): {
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case MAXWELL3D_REG_INDEX(macros.data): {
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@ -243,6 +251,9 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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case MAXWELL3D_REG_INDEX(data_upload): {
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case MAXWELL3D_REG_INDEX(data_upload): {
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const bool is_last_call = method_call.IsLastCall();
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const bool is_last_call = method_call.IsLastCall();
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upload_state.ProcessData(method_call.argument, is_last_call);
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upload_state.ProcessData(method_call.argument, is_last_call);
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if (is_last_call) {
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OnMemoryWrite();
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}
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break;
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break;
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}
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}
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default:
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default:
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@ -549,6 +560,7 @@ void Maxwell3D::FinishCBData() {
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const u32 id = cb_data_state.id;
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const u32 id = cb_data_state.id;
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memory_manager.WriteBlock(address, cb_data_state.buffer[id].data(), size);
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memory_manager.WriteBlock(address, cb_data_state.buffer[id].data(), size);
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OnMemoryWrite();
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cb_data_state.id = null_cb_data;
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cb_data_state.id = null_cb_data;
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cb_data_state.current = null_cb_data;
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cb_data_state.current = null_cb_data;
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@ -6,6 +6,7 @@
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#include <array>
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#include <array>
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#include <bitset>
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#include <bitset>
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#include <limits>
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#include <optional>
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#include <optional>
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#include <type_traits>
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#include <type_traits>
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#include <unordered_map>
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#include <unordered_map>
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@ -1274,6 +1275,13 @@ public:
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return execute_on;
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return execute_on;
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}
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}
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/// Notify a memory write has happened.
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void OnMemoryWrite() {
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for (const u8 store : dirty.on_write_stores) {
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dirty.flags[store] = true;
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}
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}
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enum class MMEDrawMode : u32 {
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enum class MMEDrawMode : u32 {
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Undefined,
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Undefined,
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Array,
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Array,
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@ -1289,6 +1297,12 @@ public:
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u32 gl_end_count{};
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u32 gl_end_count{};
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} mme_draw;
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} mme_draw;
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struct {
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std::bitset<std::numeric_limits<u8>::max()> flags;
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std::array<std::array<u8, Regs::NUM_REGS>, 3> tables{};
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std::array<u8, 32> on_write_stores{};
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} dirty;
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private:
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private:
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void InitializeRegisterDefaults();
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void InitializeRegisterDefaults();
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@ -56,6 +56,9 @@ void MaxwellDMA::HandleCopy() {
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return;
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return;
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}
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}
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// All copies here update the main memory, so mark all rasterizer states as invalid.
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system.GPU().Maxwell3D().OnMemoryWrite();
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if (regs.exec.is_dst_linear && regs.exec.is_src_linear) {
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if (regs.exec.is_dst_linear && regs.exec.is_src_linear) {
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// When the enable_2d bit is disabled, the copy is performed as if we were copying a 1D
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// When the enable_2d bit is disabled, the copy is performed as if we were copying a 1D
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// buffer of length `x_count`, otherwise we copy a 2D image of dimensions (x_count,
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// buffer of length `x_count`, otherwise we copy a 2D image of dimensions (x_count,
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@ -89,6 +89,9 @@ public:
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virtual void LoadDiskResources(const std::atomic_bool& stop_loading = false,
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virtual void LoadDiskResources(const std::atomic_bool& stop_loading = false,
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const DiskResourceLoadCallback& callback = {}) {}
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const DiskResourceLoadCallback& callback = {}) {}
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/// Initializes renderer dirty flags
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virtual void SetupDirtyFlags() {}
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/// Grant access to the Guest Driver Profile for recording/obtaining info on the guest driver.
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/// Grant access to the Guest Driver Profile for recording/obtaining info on the guest driver.
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GuestDriverProfile& AccessGuestDriverProfile() {
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GuestDriverProfile& AccessGuestDriverProfile() {
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return guest_driver_profile;
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return guest_driver_profile;
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