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GPU: Added asserts to our code for handling the QUERY_GET GPU command.
This is based on research from nouveau. Many things are currently unknown and will require hwtests in the future. This commit also stubs QueryMode::Write2 to do the same as Write. Nouveau code treats them interchangeably, it is currently unknown what the difference is.
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@ -147,11 +147,36 @@ void Maxwell3D::ProcessQueryGet() {
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// VAddr before writing.
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VAddr address = memory_manager.PhysicalToVirtualAddress(sequence_address);
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// TODO(Subv): Support the other query units.
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ASSERT_MSG(regs.query.query_get.unit == Regs::QueryUnit::Crop,
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"Units other than CROP are unimplemented");
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ASSERT_MSG(regs.query.query_get.short_query,
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"Writing the entire query result structure is unimplemented");
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u32 value = Memory::Read32(address);
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u32 result = 0;
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// TODO(Subv): Support the other query variables
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switch (regs.query.query_get.select) {
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case Regs::QuerySelect::Zero:
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result = 0;
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break;
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default:
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UNIMPLEMENTED_MSG("Unimplemented query select type %u",
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static_cast<u32>(regs.query.query_get.select.Value()));
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}
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// TODO(Subv): Research and implement how query sync conditions work.
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switch (regs.query.query_get.mode) {
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case Regs::QueryMode::Write: {
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case Regs::QueryMode::Write:
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case Regs::QueryMode::Write2: {
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// Write the current query sequence to the sequence address.
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u32 sequence = regs.query.query_sequence;
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Memory::Write32(address, sequence);
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// TODO(Subv): Write the proper query response structure to the address when not using short
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// mode.
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break;
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}
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default:
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@ -46,6 +46,29 @@ public:
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enum class QueryMode : u32 {
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Write = 0,
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Sync = 1,
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// TODO(Subv): It is currently unknown what the difference between method 2 and method 0
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// is.
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Write2 = 2,
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};
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enum class QueryUnit : u32 {
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VFetch = 1,
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VP = 2,
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Rast = 4,
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StrmOut = 5,
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GP = 6,
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ZCull = 7,
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Prop = 10,
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Crop = 15,
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};
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enum class QuerySelect : u32 {
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Zero = 0,
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};
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enum class QuerySyncCondition : u32 {
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NotEqual = 0,
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GreaterThan = 1,
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};
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enum class ShaderProgram : u32 {
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@ -476,7 +499,10 @@ public:
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u32 raw;
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BitField<0, 2, QueryMode> mode;
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BitField<4, 1, u32> fence;
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BitField<12, 4, u32> unit;
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BitField<12, 4, QueryUnit> unit;
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BitField<16, 1, QuerySyncCondition> sync_cond;
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BitField<23, 5, QuerySelect> select;
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BitField<28, 1, u32> short_query;
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} query_get;
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GPUVAddr QueryAddress() const {
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