Subv
dbfc39d214
GPU: Implement sampling multiple textures in the generated glsl shaders.
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All tested games that use a single texture show no regression.
Only Texture2D textures are supported right now, each shader gets its own "tex_fs/vs/gs" sampler array to maintain independent textures between shader stages, the textures themselves are reused if possible.
2018-06-06 12:58:16 -05:00
bunnei
5fb99e6a16
Merge pull request #516 from Subv/f2i_r
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GPU: Implemented the F2I_R shader instruction.
2018-06-05 22:01:29 -04:00
bunnei
38eb33f150
Merge pull request #521 from Subv/bra
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GPU: Corrected the branch targets for the shader bra instruction.
2018-06-05 10:09:35 -04:00
Subv
e7dfcdde74
GPU: Corrected the branch targets for the shader bra instruction.
2018-06-04 22:56:28 -05:00
Subv
4b89348c00
GPU: Implemented the F2I_R shader instruction.
2018-06-04 22:06:50 -05:00
bunnei
c23c30c76f
gl_shader_decompiler: Implement SHL instruction.
2018-06-04 22:36:49 -04:00
Subv
23b1e6eded
GPU: Implement the ISCADD shader instructions.
2018-06-04 20:17:41 -05:00
Subv
438a9b70cc
GPU: Added decodings for the ISCADD instructions.
2018-06-04 20:17:39 -05:00
bunnei
e8bfff7b4b
Merge pull request #514 from Subv/lop32i
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GPU: Implemented the LOP32I instruction.
2018-06-04 20:48:15 -04:00
bunnei
f564822e78
Merge pull request #510 from Subv/isetp
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GPU: Implemented the ISETP_R and ISETP_C instructions
2018-06-04 20:47:11 -04:00
bunnei
37fd4e6d9b
Merge pull request #512 from Subv/fset
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GPU: Corrected the FSET and I2F instructions.
2018-06-04 19:04:20 -04:00
bunnei
cdd92dc692
Merge pull request #501 from Subv/shader_bra
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GPU: Partially implemented the bra shader instruction
2018-06-04 18:31:07 -04:00
Subv
2933521a08
GPU: Use the bf bit in FSET to determine whether to write 0xFFFFFFFF or 1.0f.
2018-06-04 16:41:28 -05:00
Subv
5d55403f94
GPU: Calculate the correct viewport dimensions based on the scale and translate registers.
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This is how nouveau calculates the viewport width and height. For some reason some games set 0xFFFF in the VIEWPORT_HORIZ and VIEWPORT_VERT registers, maybe those are a misnomer and actually refer to something else?
2018-06-04 16:36:54 -05:00
Subv
0c688b421c
GPU: Implemented the LOP32I instruction.
2018-06-04 13:56:31 -05:00
Subv
7c181fd4f4
GPU: Implemented the ISETP_R and ISETP_C shader instructions.
2018-06-04 11:12:03 -05:00
Subv
b481d8a00d
GPU: Partially implemented the shader BRA instruction.
2018-06-03 22:26:36 -05:00
Subv
06c72b4fcf
GPU: Added decoding for the BRA instruction.
2018-06-03 22:14:00 -05:00
bunnei
ba117854f9
Merge pull request #500 from Subv/long_queries
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GPU: Partial implementation of long GPU queries.
2018-06-03 21:24:50 -04:00
Subv
d57333406d
GPU: Partial implementation of long GPU queries.
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Long queries write a 128-bit result value to memory, which consists of a 64 bit query value and a 64 bit timestamp.
In this implementation, only select=Zero of the Crop unit is implemented, this writes the query sequence as a 64 bit value, and a 0u64 value for the timestamp, since we emulate an infinitely fast GPU.
This specific type was hwtested, but more rigorous tests should be performed in the future for the other types.
2018-06-03 19:17:31 -05:00
bunnei
1efcba346a
gl_shader_decompiler: Implement TEXS component mask.
2018-06-03 12:08:17 -04:00
bunnei
bb9d39b8fe
Merge pull request #494 from bunnei/shader-tex
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gl_shader_decompiler: Implement TEX, fixes for TEXS.
2018-06-03 12:05:38 -04:00
bunnei
e54ea773fc
gl_shader_decompiler: Implement RRO as a register move.
2018-06-03 11:14:31 -04:00
bunnei
888eb345c0
gl_shader_decompiler: Implement TEX instruction.
2018-05-31 23:36:45 -04:00
bunnei
4c727d0ba8
gl_shader_decompiler: Support multi-destination for TEXS.
2018-05-31 22:57:32 -04:00
bunnei
15086a22be
Merge pull request #489 from Subv/vertexid
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Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.
2018-05-30 14:10:48 -04:00
Subv
99f12b05fa
Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.
2018-05-30 10:58:03 -05:00
bunnei
68937a662d
gl_shader_decompiler: Partially implement F2F_R instruction.
2018-05-29 23:10:44 -04:00
bunnei
ee53688ca7
shader_bytecode: Implement other variants of FMNMX.
2018-05-25 23:18:50 -04:00
bunnei
898f0fa029
Merge pull request #458 from Subv/fmnmx
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Shaders: Implemented the FMNMX shader instruction.
2018-05-20 23:44:07 -04:00
Subv
8440cef223
Shaders: Implemented the FMNMX shader instruction.
2018-05-20 17:53:06 -05:00
Subv
a056d5ad8c
ShadersDecompiler: Added decoding for the PSETP instruction.
2018-05-19 11:41:14 -05:00
bunnei
f41eb95e13
maxwell_3d: Reset vertex counts after drawing.
2018-04-29 16:23:31 -04:00
bunnei
c7ce472eeb
shader_bytecode: Add decoding for FMNMX instruction.
2018-04-29 16:05:17 -04:00
bunnei
6c464a2a4a
Merge pull request #416 from bunnei/shader-ints-p3
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gl_shader_decompiler: Implement MOV32I, partially implement I2I, I2F
2018-04-29 12:56:16 -04:00
bunnei
f87ea8fa8b
fermi_2d: Fix surface copy block height.
2018-04-28 20:40:03 -04:00
bunnei
0c01c34eff
gl_shader_decompiler: Partially implement I2I_R, and I2F_R.
2018-04-28 20:03:19 -04:00
bunnei
f2dcb39049
shader_bytecode: Add decodings for i2i instructions.
2018-04-28 20:03:18 -04:00
bunnei
a7b5ab4d9a
gl_shader_decompiler: Implement MOV32_IMM instruction.
2018-04-28 20:03:18 -04:00
Lioncash
8475496630
general: Convert assertion macros over to be fmt-compatible
2018-04-27 10:04:02 -04:00
bunnei
c9d7abe9c9
gl_shader_decompiler: Boilerplate for handling integer instructions.
2018-04-26 14:38:42 -04:00
bunnei
f81b915fd8
Merge pull request #396 from Subv/shader_ops
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Shaders: Implemented the FSET instruction.
2018-04-25 22:42:54 -04:00
Subv
20d86d8a36
GPU: Partially implemented the Fermi2D surface copy operation.
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The hardware allows for some rather complicated operations to be performed on the data during the copy, this is not implemented.
Only same-format same-size raw copies are implemented for now.
2018-04-25 12:54:26 -05:00
Subv
e9ad8e9185
Shaders: Added bit decodings for the I2I instruction.
2018-04-25 12:52:55 -05:00
Subv
378c881427
GPU: Added surface copy registers to Fermi2D
2018-04-25 11:55:29 -05:00
Subv
b1109931b9
GPU: Added boilerplate code for the Fermi2D engine
2018-04-25 11:55:29 -05:00
Subv
c16cfbbc6c
GPU: Reduce the number of registers of Maxwell3D to 0xE00.
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The rest are just macro shim registers.
2018-04-25 11:55:28 -05:00
Subv
a994446b6e
GPU: Move the Maxwell3D macro uploading code to the inside of the Maxwell3D processor.
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It doesn't belong in the PFIFO handler.
2018-04-25 11:55:27 -05:00
Lioncash
b7551e457b
video-core: Move logging macros over to new fmt-capable ones
2018-04-25 09:13:57 -04:00
Subv
0369ee7248
Shaders: Added decodings for the FSET instructions.
2018-04-24 22:42:54 -05:00