2020-01-16 00:21:54 +01:00
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#include "librfu.h"
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static void Sio32IDIntr(void);
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static void Sio32IDInit(void);
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static s32 Sio32IDMain(void);
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2020-01-16 00:28:23 +01:00
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struct RfuSIO32Id gRfuSIO32Id;
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2020-01-16 00:21:54 +01:00
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2020-01-16 00:28:23 +01:00
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static const u16 Sio32ConnectionData[] = { 0x494e, 0x544e, 0x4e45, 0x4f44 }; // NINTENDO
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static const char Sio32IDLib_Var[] = "Sio32ID_030820";
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2020-01-16 00:21:54 +01:00
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s32 AgbRFU_checkID(u8 r5)
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{
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u16 r8;
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vu16 *r4;
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s32 r6;
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if (REG_IME == 0)
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return -1;
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r8 = REG_IE;
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gSTWIStatus->state = 10;
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STWI_set_Callback_ID(Sio32IDIntr);
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Sio32IDInit();
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r4 = ®_TMCNT_L(gSTWIStatus->timerSelect);
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r5 *= 8;
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while (--r5 != 0xFF)
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{
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r6 = Sio32IDMain();
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if (r6 != 0)
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break;
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r4[1] = 0;
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r4[0] = 0;
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r4[1] = TIMER_1024CLK | TIMER_ENABLE;
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while (r4[0] < 32)
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;
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r4[1] = 0;
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r4[0] = 0;
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}
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REG_IME = 0;
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REG_IE = r8;
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REG_IME = 1;
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gSTWIStatus->state = 0;
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STWI_set_Callback_ID(NULL);
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return r6;
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}
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static void Sio32IDInit(void)
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{
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REG_IME = 0;
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REG_IE &= ~((8 << gSTWIStatus->timerSelect) | INTR_FLAG_SERIAL);
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REG_IME = 1;
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REG_RCNT = 0;
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REG_SIOCNT = SIO_32BIT_MODE;
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REG_SIOCNT |= SIO_INTR_ENABLE | SIO_ENABLE;
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CpuFill32(0, &gRfuSIO32Id, sizeof(struct RfuSIO32Id));
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REG_IF = INTR_FLAG_SERIAL;
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}
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static s32 Sio32IDMain(void)
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{
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u8 r12;
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switch (r12 = gRfuSIO32Id.unk1)
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{
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case 0:
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gRfuSIO32Id.unk0 = 1;
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REG_SIOCNT |= SIO_38400_BPS;
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REG_IME = r12;
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REG_IE |= INTR_FLAG_SERIAL;
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REG_IME = 1;
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gRfuSIO32Id.unk1 = 1;
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*(vu8 *)®_SIOCNT |= SIO_ENABLE;
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break;
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case 1:
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if (gRfuSIO32Id.unkA == 0)
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{
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if (gRfuSIO32Id.unk0 == 1)
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{
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if (gRfuSIO32Id.unk2 == 0)
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{
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REG_IME = gRfuSIO32Id.unk2;
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REG_SIOCNT |= SIO_ENABLE;
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REG_IME = r12;
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}
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}
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else if (gRfuSIO32Id.unk4 != 0x8001 && !gRfuSIO32Id.unk2)
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{
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REG_IME = gRfuSIO32Id.unk2;
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REG_IE &= ~INTR_FLAG_SERIAL;
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REG_IME = r12;
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REG_SIOCNT = gRfuSIO32Id.unk2;
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REG_SIOCNT = SIO_32BIT_MODE;
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REG_IF = INTR_FLAG_SERIAL;
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REG_SIOCNT |= SIO_INTR_ENABLE | SIO_ENABLE;
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REG_IME = gRfuSIO32Id.unk2;
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REG_IE |= INTR_FLAG_SERIAL;
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REG_IME = r12;
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}
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break;
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}
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else
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{
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gRfuSIO32Id.unk1 = 2;
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// fallthrough
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}
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default:
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return gRfuSIO32Id.unkA;
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}
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return 0;
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}
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static void Sio32IDIntr(void)
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{
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u32 r5;
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u16 r0;
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#ifndef NONMATCHING
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register u32 r1 asm("r1");
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register u16 r0_ asm("r0");
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#else
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u32 r1;
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u16 r0_;
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#endif
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r5 = REG_SIODATA32;
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if (gRfuSIO32Id.unk0 != 1)
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REG_SIOCNT |= SIO_ENABLE;
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r1 = 16 * gRfuSIO32Id.unk0; // to handle side effect of inline asm
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r1 = (r5 << r1) >> 16;
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r5 = (r5 << 16 * (1 - gRfuSIO32Id.unk0)) >> 16;
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if (gRfuSIO32Id.unkA == 0)
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{
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if (r1 == gRfuSIO32Id.unk6)
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{
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if (gRfuSIO32Id.unk2 > 3)
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{
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gRfuSIO32Id.unkA = r5;
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}
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else if (r1 == (u16)~gRfuSIO32Id.unk4)
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{
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r0_ = ~gRfuSIO32Id.unk6;
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if (r5 == r0_)
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++gRfuSIO32Id.unk2;
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}
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}
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else
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{
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gRfuSIO32Id.unk2 = gRfuSIO32Id.unkA;
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}
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}
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if (gRfuSIO32Id.unk2 < 4)
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gRfuSIO32Id.unk4 = *(gRfuSIO32Id.unk2 + Sio32ConnectionData);
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else
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gRfuSIO32Id.unk4 = 0x8001;
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gRfuSIO32Id.unk6 = ~r5;
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REG_SIODATA32 = (gRfuSIO32Id.unk4 << 16 * (1 - gRfuSIO32Id.unk0))
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+ (gRfuSIO32Id.unk6 << 16 * gRfuSIO32Id.unk0);
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if (gRfuSIO32Id.unk0 == 1 && (gRfuSIO32Id.unk2 || r5 == 0x494E))
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{
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for (r0 = 0; r0 < 600; ++r0)
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;
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if (gRfuSIO32Id.unkA == 0)
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REG_SIOCNT |= SIO_ENABLE;
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}
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}
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