mirror of
https://github.com/Ninjdai1/pokeemerald.git
synced 2024-12-26 11:44:17 +01:00
update asm
This commit is contained in:
YamaArashi
parent
cf8f490381
commit
4e95a13295
3536
asm/emerald.s
3536
asm/emerald.s
File diff suppressed because it is too large
Load Diff
48
asm/gpu_bg.s
48
asm/gpu_bg.s
@ -635,7 +635,7 @@ _08001796:
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thumb_func_end SetBgAffineInternal
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thumb_func_start IsInvalidBg
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; BOOL IsInvalidBg(u8 bg)
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; bool8 IsInvalidBg(u8 bg)
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IsInvalidBg: ; 80017A4
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push {lr}
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lsls r0, 24
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@ -1062,7 +1062,7 @@ _08001AC8:
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thumb_func_end Unused_LoadBgPalette
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thumb_func_start IsDma3ManagerBusyWithBgCopy
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; BOOL IsDma3ManagerBusyWithBgCopy()
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; bool8 IsDma3ManagerBusyWithBgCopy()
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IsDma3ManagerBusyWithBgCopy: ; 8001AD4
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push {r4-r7,lr}
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movs r5, 0
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@ -1776,7 +1776,7 @@ _0800204A:
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lsls r0, 8
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lsrs r1, r0, 16
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movs r0, 0x12
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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b _080020E0
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.pool
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_08002060:
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@ -1785,7 +1785,7 @@ _08002060:
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lsls r0, 8
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lsrs r1, r0, 16
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movs r0, 0x16
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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b _080020E0
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.pool
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_08002074:
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@ -1796,7 +1796,7 @@ _08002074:
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lsls r0, 8
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lsrs r1, r0, 16
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movs r0, 0x1A
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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b _080020E0
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.pool
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_0800208C:
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@ -1806,10 +1806,10 @@ _0800208C:
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lsls r0, 16
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lsrs r4, r0, 16
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movs r0, 0x2E
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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movs r0, 0x2C
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adds r1, r4, 0
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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b _080020E0
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.pool
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_080020AC:
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@ -1820,7 +1820,7 @@ _080020AC:
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lsls r0, 8
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lsrs r1, r0, 16
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movs r0, 0x1E
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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b _080020E0
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.pool
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_080020C4:
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@ -1832,10 +1832,10 @@ _080020C4:
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lsls r0, 16
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lsrs r4, r0, 16
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movs r0, 0x3E
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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movs r0, 0x3C
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adds r1, r4, 0
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bl SetGpuReg_ScreenOff
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bl SetGpuReg_ForcedBlank
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_080020E0:
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ldr r0, =0x030008f8
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adds r0, 0xC
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@ -2038,9 +2038,9 @@ _08002226:
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bx r1
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thumb_func_end Unused_AdjustBgMosaic
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thumb_func_start SetBgTilemap
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; void SetBgTilemap(u8 bg, void *tilemap)
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SetBgTilemap: ; 8002250
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thumb_func_start SetBgTilemapBuffer
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; void SetBgTilemapBuffer(u8 bg, void *tilemap)
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SetBgTilemapBuffer: ; 8002250
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push {r4,r5,lr}
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adds r5, r1, 0
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lsls r0, 24
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@ -2065,11 +2065,11 @@ _0800227A:
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetBgTilemap
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thumb_func_end SetBgTilemapBuffer
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thumb_func_start UnsetBgTilemap
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; void UnsetBgTilemap(u8 bg)
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UnsetBgTilemap: ; 8002284
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thumb_func_start UnsetBgTilemapBuffer
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; void UnsetBgTilemapBuffer(u8 bg)
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UnsetBgTilemapBuffer: ; 8002284
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push {r4,r5,lr}
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lsls r0, 24
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lsrs r4, r0, 24
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@ -2094,11 +2094,11 @@ _080022AE:
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pop {r0}
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bx r0
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.pool
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thumb_func_end UnsetBgTilemap
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thumb_func_end UnsetBgTilemapBuffer
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thumb_func_start GetBgTilemap
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; void *GetBgTilemap(u8 bg)
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GetBgTilemap: ; 80022B8
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thumb_func_start GetBgTilemapBuffer
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; void *GetBgTilemapBuffer(u8 bg)
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GetBgTilemapBuffer: ; 80022B8
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push {r4,lr}
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lsls r0, 24
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lsrs r0, 24
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@ -2125,7 +2125,7 @@ _080022EA:
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pop {r4}
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pop {r1}
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bx r1
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thumb_func_end GetBgTilemap
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thumb_func_end GetBgTilemapBuffer
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thumb_func_start CopyToBgTilemapBuffer
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; void CopyToBgTilemapBuffer(u8 bg, void *src, u16 mode, u16 destOffset)
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@ -3314,7 +3314,7 @@ _08002B90:
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thumb_func_end GetBgType
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thumb_func_start IsInvalidBg_
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; BOOL IsInvalidBg_(u8 bg)
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; bool8 IsInvalidBg_(u8 bg)
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IsInvalidBg_: ; 8002B9C
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push {lr}
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lsls r0, 24
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@ -3331,7 +3331,7 @@ _08002BAC:
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thumb_func_end IsInvalidBg_
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thumb_func_start IsTileMapOutsideWram
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; BOOL IsTileMapOutsideWram(u8 bg)
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; bool8 IsTileMapOutsideWram(u8 bg)
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IsTileMapOutsideWram: ; 8002BB0
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push {lr}
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lsls r0, 24
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@ -174,9 +174,9 @@ _08001130:
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.pool
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thumb_func_end SetGpuReg
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thumb_func_start SetGpuReg_ScreenOff
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; void SetGpuReg_ScreenOff(u8 reg, u16 value)
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SetGpuReg_ScreenOff: ; 8001140
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thumb_func_start SetGpuReg_ForcedBlank
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; void SetGpuReg_ForcedBlank(u8 reg, u16 value)
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SetGpuReg_ForcedBlank: ; 8001140
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push {r4,r5,lr}
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lsls r0, 24
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lsrs r4, r0, 24
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@ -235,7 +235,7 @@ _080011A8:
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetGpuReg_ScreenOff
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thumb_func_end SetGpuReg_ForcedBlank
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thumb_func_start GetGpuReg
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; u16 GetGpuReg(u8 reg)
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@ -286,9 +286,9 @@ SetGpuRegBits: ; 80011E8
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.pool
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thumb_func_end SetGpuRegBits
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thumb_func_start ResetGpuRegBits
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; void ResetGpuRegBits(u8 reg, u16 mask)
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ResetGpuRegBits: ; 8001208
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thumb_func_start ClearGpuRegBits
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; void ClearGpuRegBits(u8 reg, u16 mask)
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ClearGpuRegBits: ; 8001208
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push {lr}
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adds r2, r1, 0
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lsls r0, 24
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@ -303,11 +303,11 @@ ResetGpuRegBits: ; 8001208
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pop {r0}
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bx r0
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.pool
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thumb_func_end ResetGpuRegBits
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thumb_func_end ClearGpuRegBits
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thumb_func_start SyncIEReg
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; void SyncIEReg()
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SyncIEReg: ; 8001228
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thumb_func_start SyncRegIE
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; void SyncRegIE()
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SyncRegIE: ; 8001228
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push {r4,r5,lr}
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ldr r5, =0x030008d9
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ldrb r0, [r5]
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@ -328,7 +328,7 @@ _08001246:
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pop {r0}
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bx r0
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.pool
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thumb_func_end SyncIEReg
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thumb_func_end SyncRegIE
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thumb_func_start EnableInterrupts
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; void EnableInterrupts(u16 mask)
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@ -343,9 +343,9 @@ EnableInterrupts: ; 800125C
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ldr r1, =0x030008d9
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movs r0, 0x1
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strb r0, [r1]
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bl SyncIEReg
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bl SyncRegIE
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ldrh r0, [r4]
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bl SetDispstatVBlankHBlankInterrupts
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bl UpdateRegDispstatIntrBits
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pop {r4}
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pop {r0}
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bx r0
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@ -365,18 +365,18 @@ DisableInterrupts: ; 8001288
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ldr r1, =0x030008d9
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movs r0, 0x1
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strb r0, [r1]
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bl SyncIEReg
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bl SyncRegIE
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ldrh r0, [r4]
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bl SetDispstatVBlankHBlankInterrupts
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bl UpdateRegDispstatIntrBits
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pop {r4}
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pop {r0}
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bx r0
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.pool
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thumb_func_end DisableInterrupts
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thumb_func_start SetDispstatVBlankHBlankInterrupts
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; void SetDispstatVBlankHBlankInterrupts(u16 mask)
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SetDispstatVBlankHBlankInterrupts: ; 80012B4
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thumb_func_start UpdateRegDispstatIntrBits
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; void UpdateRegDispstatIntrBits(u16 mask)
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UpdateRegDispstatIntrBits: ; 80012B4
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push {r4,lr}
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adds r4, r0, 0
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lsls r4, 16
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@ -407,4 +407,4 @@ _080012EA:
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pop {r4}
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pop {r0}
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bx r0
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thumb_func_end SetDispstatVBlankHBlankInterrupts
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thumb_func_end UpdateRegDispstatIntrBits
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@ -187,9 +187,9 @@ StartTimer1: ; 8000554
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.pool
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thumb_func_end StartTimer1
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thumb_func_start SetRngAndSetTrainerId
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; void SetRngAndSetTrainerId()
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SetRngAndSetTrainerId: ; 8000560
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thumb_func_start SeedRngAndSetTrainerId
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; void SeedRngAndSetTrainerId()
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SeedRngAndSetTrainerId: ; 8000560
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push {r4,lr}
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ldr r0, =0x04000104
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ldrh r4, [r0]
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@ -204,7 +204,7 @@ SetRngAndSetTrainerId: ; 8000560
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetRngAndSetTrainerId
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thumb_func_end SeedRngAndSetTrainerId
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thumb_func_start GetTrainerId
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; u16 GetTrainerId()
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@ -2,7 +2,7 @@
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; void CB2_MainMenu()
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CB2_MainMenu: ; 802F6B0
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push {lr}
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bl run_active_tasks
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bl RunActiveTasks
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bl CallObjectCallbacks
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bl PrepareSpritesForOamLoad
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bl fade_and_return_progress_probably
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@ -42,7 +42,7 @@ CB2_ReinitMainMenu: ; 802F6E8
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thumb_func_end CB2_ReinitMainMenu
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thumb_func_start InitMainMenu
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; void InitMainMenu(BOOL affects_palette_maybe)
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; void InitMainMenu(bool8 affects_palette_maybe)
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InitMainMenu: ; 802F6F4
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push {r4,r5,lr}
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sub sp, 0xC
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@ -702,7 +702,7 @@ _0802FCBC:
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ldr r5, =0x000001d5
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adds r0, r4, 0
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adds r1, r5, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r4, 0x8
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b _0802FED4
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.pool
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@ -766,11 +766,11 @@ _0802FD44:
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ldr r5, =0x000001d5
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adds r0, r4, 0
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adds r1, r5, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r0, r4, 0
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adds r0, 0x8
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adds r1, r5, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r4, 0x10
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b _0802FED4
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.pool
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@ -851,20 +851,20 @@ _0802FE00:
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ldr r5, =0x000001d5
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adds r0, r4, 0
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adds r1, r5, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r0, r4, 0
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adds r0, 0x8
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adds r1, r5, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r0, r4, 0
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adds r0, 0x10
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adds r1, r5, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r4, 0x18
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_0802FED4:
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adds r0, r4, 0
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adds r1, r5, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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b _0803005E
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.pool
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_0802FEFC:
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@ -961,27 +961,27 @@ _0802FEFC:
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ldr r4, =0x000001d5
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adds r0, r5, 0
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adds r1, r4, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r0, r5, 0
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adds r0, 0x8
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adds r1, r4, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r0, r5, 0
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adds r0, 0x10
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adds r1, r4, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r0, r5, 0
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adds r0, 0x18
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adds r1, r4, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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adds r0, r5, 0
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adds r0, 0x20
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adds r1, r4, 0
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bl DrawMainMenuWindowFrame
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bl DrawMainMenuWindowBorder
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ldr r0, =gUnknown_082FF0F4
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ldr r4, =0x02022d06
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adds r1, r4, 0
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bl sub_81AF380
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bl AddScrollIndicatorArrowPair
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lsls r0, 24
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lsrs r0, 24
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strh r0, [r6, 0x1A]
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@ -991,7 +991,7 @@ _0802FEFC:
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adds r0, r1
|
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lsls r0, 3
|
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add r0, r8
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ldr r1, =sub_81AF59C
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ldr r1, =Task_ScrollIndicatorArrowPairOnMainMenu
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str r1, [r0]
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ldrh r0, [r4]
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cmp r0, 0x4
|
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@ -1283,7 +1283,7 @@ _08030292:
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ldrh r0, [r4, 0x22]
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lsls r0, 24
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lsrs r0, 24
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bl sub_81AF620
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bl RemoveScrollIndicatorArrowPair
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_080302B0:
|
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movs r0, 0
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||||
movs r1, 0x1
|
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@ -1596,7 +1596,7 @@ Task_HandleMainMenuBPressed: ; 8030544
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ldrh r0, [r1, 0x22]
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lsls r0, 24
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lsrs r0, 24
|
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bl sub_81AF620
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bl RemoveScrollIndicatorArrowPair
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_08030578:
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ldr r0, =0x02022d06
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strh r4, [r0]
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@ -4408,7 +4408,7 @@ sub_8031D74: ; 8031D74
|
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push {lr}
|
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ldr r0, =gUnknown_082FF088
|
||||
movs r1, 0xF3
|
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bl DrawMainMenuWindowFrame
|
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bl DrawMainMenuWindowBorder
|
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movs r0, 0x1
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movs r1, 0x11
|
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bl FillWindowPixelBuffer
|
||||
@ -4510,7 +4510,7 @@ CreateMainMenuErrorWindow: ; 8031E18
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||||
bl CopyWindowToVram
|
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ldr r0, =gUnknown_082FF070
|
||||
ldr r1, =0x000001d5
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bl DrawMainMenuWindowFrame
|
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bl DrawMainMenuWindowBorder
|
||||
ldr r1, =0x000009e7
|
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movs r0, 0x40
|
||||
bl SetGpuReg
|
||||
@ -4797,9 +4797,9 @@ LoadMainMenuWindowFrameTiles: ; 80320A4
|
||||
.pool
|
||||
thumb_func_end LoadMainMenuWindowFrameTiles
|
||||
|
||||
thumb_func_start DrawMainMenuWindowFrame
|
||||
; void DrawMainMenuWindowFrame(struct WindowTemplate *template, u16 baseTileNum)
|
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DrawMainMenuWindowFrame: ; 80320EC
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thumb_func_start DrawMainMenuWindowBorder
|
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; void DrawMainMenuWindowBorder(struct WindowTemplate *template, u16 baseTileNum)
|
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DrawMainMenuWindowBorder: ; 80320EC
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||||
push {r4-r7,lr}
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||||
mov r7, r10
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||||
mov r6, r9
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||||
@ -4969,7 +4969,7 @@ DrawMainMenuWindowFrame: ; 80320EC
|
||||
pop {r4-r7}
|
||||
pop {r0}
|
||||
bx r0
|
||||
thumb_func_end DrawMainMenuWindowFrame
|
||||
thumb_func_end DrawMainMenuWindowBorder
|
||||
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||||
thumb_func_start sub_8032250
|
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sub_8032250: ; 8032250
|
||||
@ -5212,7 +5212,7 @@ sub_80323CC: ; 80323CC
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||||
mov r1, r8
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||||
adds r2, r6, 0
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||||
movs r3, 0
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bl sub_81996C0
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||||
bl CreateYesNoMenu
|
||||
add sp, 0x20
|
||||
pop {r3}
|
||||
mov r8, r3
|
||||
|
||||
@ -184,7 +184,7 @@ _08000AB8:
|
||||
thumb_func_end AllocZeroedInternal
|
||||
|
||||
thumb_func_start CheckMemBlockInternal
|
||||
; BOOL CheckMemBlockInternal(struct MemBlock *head, struct MemBlock *node)
|
||||
; bool8 CheckMemBlockInternal(struct MemBlock *head, struct MemBlock *node)
|
||||
CheckMemBlockInternal: ; 8000AC4
|
||||
push {r4,r5,lr}
|
||||
adds r5, r0, 0
|
||||
@ -289,7 +289,7 @@ Free: ; 8000B60
|
||||
thumb_func_end Free
|
||||
|
||||
thumb_func_start CheckMemBlock
|
||||
; BOOL CheckMemBlock(void *pointer)
|
||||
; bool8 CheckMemBlock(void *pointer)
|
||||
CheckMemBlock: ; 8000B74
|
||||
push {lr}
|
||||
adds r1, r0, 0
|
||||
@ -302,7 +302,7 @@ CheckMemBlock: ; 8000B74
|
||||
thumb_func_end CheckMemBlock
|
||||
|
||||
thumb_func_start CheckHeap
|
||||
; BOOL CheckHeap()
|
||||
; bool8 CheckHeap()
|
||||
CheckHeap: ; 8000B88
|
||||
push {r4,r5,lr}
|
||||
ldr r0, =0x03000004
|
||||
|
||||
@ -51,7 +51,7 @@ _0802F11C:
|
||||
thumb_func_end GameFreakRTC_ConvertFromBCD
|
||||
|
||||
thumb_func_start GameFreakRTC_IsLeapYear
|
||||
; BOOL GameFreakRTC_IsLeapYear(u32 year)
|
||||
; bool8 GameFreakRTC_IsLeapYear(u32 year)
|
||||
GameFreakRTC_IsLeapYear: ; 802F120
|
||||
push {r4,lr}
|
||||
adds r4, r0, 0
|
||||
|
||||
@ -263,7 +263,7 @@ _08008C8E:
|
||||
thumb_func_end CompareString_LimitN
|
||||
|
||||
thumb_func_start IsStringLengthLessThanN
|
||||
; BOOL IsStringLengthLessThanN(u8 *s, s32 n)
|
||||
; bool8 IsStringLengthLessThanN(u8 *s, s32 n)
|
||||
IsStringLengthLessThanN: ; 8008C94
|
||||
push {lr}
|
||||
adds r3, r0, 0
|
||||
@ -1106,7 +1106,7 @@ _08009218:
|
||||
thumb_func_end WriteColorChangeControlCode
|
||||
|
||||
thumb_func_start sub_8009228
|
||||
; BOOL sub_8009228(u8 *s)
|
||||
; bool8 sub_8009228(u8 *s)
|
||||
sub_8009228: ; 8009228
|
||||
push {lr}
|
||||
adds r2, r0, 0
|
||||
@ -1133,7 +1133,7 @@ _08009248:
|
||||
thumb_func_end sub_8009228
|
||||
|
||||
thumb_func_start sub_800924C
|
||||
; BOOL sub_800924C(u8 *s, u32 n)
|
||||
; bool8 sub_800924C(u8 *s, u32 n)
|
||||
sub_800924C: ; 800924C
|
||||
push {r4,lr}
|
||||
adds r3, r0, 0
|
||||
@ -1252,7 +1252,7 @@ _080092FE:
|
||||
thumb_func_end CompareStringWithoutExtendedControlCodes
|
||||
|
||||
thumb_func_start StopMusicWhileStringIsPrinted
|
||||
; void StopMusicWhileStringIsPrinted(u8 *s, BOOL stopMusic)
|
||||
; void StopMusicWhileStringIsPrinted(u8 *s, bool8 stopMusic)
|
||||
StopMusicWhileStringIsPrinted: ; 8009308
|
||||
push {r4,lr}
|
||||
adds r4, r0, 0
|
||||
|
||||
@ -235,9 +235,9 @@ _080A9106:
|
||||
bx r0
|
||||
thumb_func_end remove_task
|
||||
|
||||
thumb_func_start run_active_tasks
|
||||
; void run_active_tasks()
|
||||
run_active_tasks: ; 80A910C
|
||||
thumb_func_start RunActiveTasks
|
||||
; void RunActiveTasks()
|
||||
RunActiveTasks: ; 80A910C
|
||||
push {r4,r5,lr}
|
||||
bl get_first_active_task
|
||||
lsls r0, 24
|
||||
@ -260,7 +260,7 @@ _080A9130:
|
||||
pop {r0}
|
||||
bx r0
|
||||
.pool
|
||||
thumb_func_end run_active_tasks
|
||||
thumb_func_end RunActiveTasks
|
||||
|
||||
thumb_func_start get_first_active_task
|
||||
; int get_first_active_task()
|
||||
|
||||
@ -309,7 +309,7 @@ _080047F6:
|
||||
thumb_func_end RunTextPrinters
|
||||
|
||||
thumb_func_start IsTextPrinterActive
|
||||
; BOOL IsTextPrinterActive(u8 id)
|
||||
; bool8 IsTextPrinterActive(u8 id)
|
||||
IsTextPrinterActive: ; 8004800
|
||||
lsls r0, 24
|
||||
lsrs r0, 24
|
||||
@ -2219,7 +2219,7 @@ TextPrinterClearDownArrow: ; 8005600
|
||||
thumb_func_end TextPrinterClearDownArrow
|
||||
|
||||
thumb_func_start TextPrinterWaitAutoMode
|
||||
; BOOL TextPrinterWaitAutoMode(struct TextPrinter *textPrinter)
|
||||
; bool8 TextPrinterWaitAutoMode(struct TextPrinter *textPrinter)
|
||||
TextPrinterWaitAutoMode: ; 8005634
|
||||
push {lr}
|
||||
adds r1, r0, 0
|
||||
@ -2239,7 +2239,7 @@ _0800564A:
|
||||
thumb_func_end TextPrinterWaitAutoMode
|
||||
|
||||
thumb_func_start TextPrinterWaitWithDownArrow
|
||||
; BOOL TextPrinterWaitWithDownArrow(struct TextPrinter *textPrinter)
|
||||
; bool8 TextPrinterWaitWithDownArrow(struct TextPrinter *textPrinter)
|
||||
TextPrinterWaitWithDownArrow: ; 8005650
|
||||
push {r4,lr}
|
||||
adds r2, r0, 0
|
||||
@ -2277,7 +2277,7 @@ _0800568E:
|
||||
thumb_func_end TextPrinterWaitWithDownArrow
|
||||
|
||||
thumb_func_start TextPrinterWait
|
||||
; BOOL TextPrinterWait(struct TextPrinter *textPrinter)
|
||||
; bool8 TextPrinterWait(struct TextPrinter *textPrinter)
|
||||
TextPrinterWait: ; 800569C
|
||||
push {r4,lr}
|
||||
adds r2, r0, 0
|
||||
@ -2313,7 +2313,7 @@ _080056D4:
|
||||
thumb_func_end TextPrinterWait
|
||||
|
||||
thumb_func_start DrawDownArrow
|
||||
; void DrawDownArrow(u8 windowId, u16 x, u16 y, u8 bgColor, BOOL drawArrow, u8 *counter, u8 *yCoordIndex)
|
||||
; void DrawDownArrow(u8 windowId, u16 x, u16 y, u8 bgColor, bool8 drawArrow, u8 *counter, u8 *yCoordIndex)
|
||||
DrawDownArrow: ; 80056E0
|
||||
push {r4-r7,lr}
|
||||
mov r7, r10
|
||||
@ -4029,7 +4029,7 @@ GetMenuCursorDimensionByFont: ; 8006460
|
||||
thumb_func_end GetMenuCursorDimensionByFont
|
||||
|
||||
thumb_func_start DecompressGlyphFont0
|
||||
; void DecompressGlyphFont0(u16 glyphId, BOOL isJapanese)
|
||||
; void DecompressGlyphFont0(u16 glyphId, bool8 isJapanese)
|
||||
DecompressGlyphFont0: ; 8006478
|
||||
push {r4,r5,lr}
|
||||
lsls r0, 16
|
||||
@ -4118,7 +4118,7 @@ _08006534:
|
||||
thumb_func_end DecompressGlyphFont0
|
||||
|
||||
thumb_func_start GetGlyphWidthFont0
|
||||
; u8 GetGlyphWidthFont0(u16 glyphId, BOOL isJapanese)
|
||||
; u8 GetGlyphWidthFont0(u16 glyphId, bool8 isJapanese)
|
||||
GetGlyphWidthFont0: ; 8006540
|
||||
push {lr}
|
||||
lsls r0, 16
|
||||
@ -4138,7 +4138,7 @@ _0800655A:
|
||||
thumb_func_end GetGlyphWidthFont0
|
||||
|
||||
thumb_func_start DecompressGlyphFont7
|
||||
; void DecompressGlyphFont7(u16 glyphId, BOOL isJapanese)
|
||||
; void DecompressGlyphFont7(u16 glyphId, bool8 isJapanese)
|
||||
DecompressGlyphFont7: ; 8006560
|
||||
push {r4-r6,lr}
|
||||
lsls r0, 16
|
||||
@ -4227,7 +4227,7 @@ _0800661C:
|
||||
thumb_func_end DecompressGlyphFont7
|
||||
|
||||
thumb_func_start GetGlyphWidthFont7
|
||||
; u8 GetGlyphWidthFont7(u16 glyphId, BOOL isJapanese)
|
||||
; u8 GetGlyphWidthFont7(u16 glyphId, bool8 isJapanese)
|
||||
GetGlyphWidthFont7: ; 8006628
|
||||
push {lr}
|
||||
lsls r0, 16
|
||||
@ -4247,7 +4247,7 @@ _08006642:
|
||||
thumb_func_end GetGlyphWidthFont7
|
||||
|
||||
thumb_func_start DecompressGlyphFont8
|
||||
; void DecompressGlyphFont8(u16 glyphId, BOOL isJapanese)
|
||||
; void DecompressGlyphFont8(u16 glyphId, bool8 isJapanese)
|
||||
DecompressGlyphFont8: ; 8006648
|
||||
push {r4,r5,lr}
|
||||
lsls r0, 16
|
||||
@ -4336,7 +4336,7 @@ _08006704:
|
||||
thumb_func_end DecompressGlyphFont8
|
||||
|
||||
thumb_func_start GetGlyphWidthFont8
|
||||
; u8 GetGlyphWidthFont8(u16 glyphId, BOOL isJapanese)
|
||||
; u8 GetGlyphWidthFont8(u16 glyphId, bool8 isJapanese)
|
||||
GetGlyphWidthFont8: ; 8006710
|
||||
push {lr}
|
||||
lsls r0, 16
|
||||
@ -4356,7 +4356,7 @@ _0800672A:
|
||||
thumb_func_end GetGlyphWidthFont8
|
||||
|
||||
thumb_func_start DecompressGlyphFont2
|
||||
; void DecompressGlyphFont2(u16 glyphId, BOOL isJapanese)
|
||||
; void DecompressGlyphFont2(u16 glyphId, bool8 isJapanese)
|
||||
DecompressGlyphFont2: ; 8006730
|
||||
push {r4-r6,lr}
|
||||
lsls r0, 16
|
||||
@ -4459,7 +4459,7 @@ _08006810:
|
||||
thumb_func_end DecompressGlyphFont2
|
||||
|
||||
thumb_func_start GetGlyphWidthFont2
|
||||
; u8 GetGlyphWidthFont2(u16 glyphId, BOOL isJapanese)
|
||||
; u8 GetGlyphWidthFont2(u16 glyphId, bool8 isJapanese)
|
||||
GetGlyphWidthFont2: ; 800681C
|
||||
push {lr}
|
||||
lsls r0, 16
|
||||
@ -4480,7 +4480,7 @@ _08006832:
|
||||
thumb_func_end GetGlyphWidthFont2
|
||||
|
||||
thumb_func_start DecompressGlyphFont1
|
||||
; void DecompressGlyphFont1(u16 glyphId, BOOL isJapanese)
|
||||
; void DecompressGlyphFont1(u16 glyphId, bool8 isJapanese)
|
||||
DecompressGlyphFont1: ; 8006840
|
||||
push {r4-r6,lr}
|
||||
lsls r0, 16
|
||||
@ -4569,7 +4569,7 @@ _080068FC:
|
||||
thumb_func_end DecompressGlyphFont1
|
||||
|
||||
thumb_func_start GetGlyphWidthFont1
|
||||
; u8 GetGlyphWidthFont1(u16 glyphId, BOOL isJapanese)
|
||||
; u8 GetGlyphWidthFont1(u16 glyphId, bool8 isJapanese)
|
||||
GetGlyphWidthFont1: ; 8006908
|
||||
push {lr}
|
||||
lsls r0, 16
|
||||
|
||||
16
asm/window.s
16
asm/window.s
@ -4,7 +4,7 @@ nullsub_8: ; 80031BC
|
||||
thumb_func_end nullsub_8
|
||||
|
||||
thumb_func_start InitWindows
|
||||
; BOOL16 InitWindows(struct WindowTemplate *templates)
|
||||
; bool16 InitWindows(struct WindowTemplate *templates)
|
||||
InitWindows: ; 80031C0
|
||||
push {r4-r7,lr}
|
||||
mov r7, r10
|
||||
@ -20,7 +20,7 @@ _080031D4:
|
||||
mov r1, r8
|
||||
lsls r0, r1, 24
|
||||
lsrs r0, 24
|
||||
bl GetBgTilemap
|
||||
bl GetBgTilemapBuffer
|
||||
cmp r0, 0
|
||||
beq _080031E4
|
||||
ldr r0, =nullsub_8
|
||||
@ -129,7 +129,7 @@ _080032BC:
|
||||
str r4, [r0]
|
||||
adds r0, r7, 0
|
||||
adds r1, r4, 0
|
||||
bl SetBgTilemap
|
||||
bl SetBgTilemapBuffer
|
||||
_080032CA:
|
||||
ldrb r1, [r6, 0x3]
|
||||
ldrb r0, [r6, 0x4]
|
||||
@ -307,7 +307,7 @@ _08003424:
|
||||
str r4, [r0]
|
||||
adds r0, r7, 0
|
||||
adds r1, r4, 0
|
||||
bl SetBgTilemap
|
||||
bl SetBgTilemapBuffer
|
||||
_08003432:
|
||||
mov r2, r8
|
||||
ldrb r1, [r2, 0x3]
|
||||
@ -1042,7 +1042,7 @@ BlitBitmapToWindow: ; 80039A4
|
||||
thumb_func_end BlitBitmapToWindow
|
||||
|
||||
thumb_func_start BlitBitmapRectToWindow
|
||||
; void BlitBitmapRectToWindow(u8 rbox_id, u8 *pixels, u16 srcX, u16 srcY, u16 srcWidth, int srcHeight, u16 destX, u16 destY, u16 rectWidth, u16 rectHeight)
|
||||
; void BlitBitmapRectToWindow(u8 windowId, u8 *pixels, u16 srcX, u16 srcY, u16 srcWidth, int srcHeight, u16 destX, u16 destY, u16 rectWidth, u16 rectHeight)
|
||||
BlitBitmapRectToWindow: ; 80039DC
|
||||
push {r4-r7,lr}
|
||||
mov r7, r10
|
||||
@ -1347,7 +1347,7 @@ _08003C3C:
|
||||
thumb_func_end CopyToWindowPixelBuffer
|
||||
|
||||
thumb_func_start FillWindowPixelBuffer
|
||||
; void FillWindowPixelBuffer(u8 rbox_id, u32 fillValue)
|
||||
; void FillWindowPixelBuffer(u8 windowId, u32 fillValue)
|
||||
FillWindowPixelBuffer: ; 8003C48
|
||||
push {r4,r5,lr}
|
||||
sub sp, 0x4
|
||||
@ -1955,7 +1955,7 @@ CallWindowFunction: ; 8004058
|
||||
thumb_func_end CallWindowFunction
|
||||
|
||||
thumb_func_start SetWindowAttribute
|
||||
; BOOL SetWindowAttribute(u8 windowId, u8 attributeId, u32 value)
|
||||
; bool8 SetWindowAttribute(u8 windowId, u8 attributeId, u32 value)
|
||||
SetWindowAttribute: ; 80040A8
|
||||
push {lr}
|
||||
lsls r0, 24
|
||||
@ -2247,7 +2247,7 @@ _080042DC:
|
||||
str r4, [r0]
|
||||
adds r0, r7, 0
|
||||
adds r1, r4, 0
|
||||
bl SetBgTilemap
|
||||
bl SetBgTilemapBuffer
|
||||
_080042EA:
|
||||
mov r2, r9
|
||||
ldrb r1, [r2, 0x3]
|
||||
|
||||
@ -5,6 +5,16 @@ typedef signed char s8;
|
||||
typedef signed short s16;
|
||||
typedef signed int s32;
|
||||
|
||||
typedef volatile u8 vu8;
|
||||
typedef volatile u16 vu16;
|
||||
typedef volatile u32 vu32;
|
||||
typedef volatile s8 vs8;
|
||||
typedef volatile s16 vs16;
|
||||
typedef volatile s32 vs32;
|
||||
|
||||
typedef float f32;
|
||||
typedef double f64;
|
||||
|
||||
typedef u8 bool8;
|
||||
typedef u16 bool16;
|
||||
typedef u32 bool32;
|
||||
@ -14,6 +24,8 @@ typedef u32 bool32;
|
||||
#define TRUE 1
|
||||
#define FALSE 0
|
||||
|
||||
#include "io_regs.h"
|
||||
|
||||
#define CPU_SET_SRC_FIX (1 << 24)
|
||||
#define CPU_SET_32BIT (1 << 26)
|
||||
|
||||
|
||||
337
include/io_regs.h
Normal file
337
include/io_regs.h
Normal file
@ -0,0 +1,337 @@
|
||||
#define REG_BASE 0x4000000 // I/O register base address
|
||||
|
||||
// I/O register offsets
|
||||
|
||||
#define REG_OFFSET_DISPCNT 0x0
|
||||
#define REG_OFFSET_DISPSTAT 0x4
|
||||
#define REG_OFFSET_VCOUNT 0x6
|
||||
#define REG_OFFSET_BG0CNT 0x8
|
||||
#define REG_OFFSET_BG1CNT 0xa
|
||||
#define REG_OFFSET_BG2CNT 0xc
|
||||
#define REG_OFFSET_BG3CNT 0xe
|
||||
#define REG_OFFSET_BG0HOFS 0x10
|
||||
#define REG_OFFSET_BG0VOFS 0x12
|
||||
#define REG_OFFSET_BG1HOFS 0x14
|
||||
#define REG_OFFSET_BG1VOFS 0x16
|
||||
#define REG_OFFSET_BG2HOFS 0x18
|
||||
#define REG_OFFSET_BG2VOFS 0x1a
|
||||
#define REG_OFFSET_BG3HOFS 0x1c
|
||||
#define REG_OFFSET_BG3VOFS 0x1e
|
||||
#define REG_OFFSET_BG2PA 0x20
|
||||
#define REG_OFFSET_BG2PB 0x22
|
||||
#define REG_OFFSET_BG2PC 0x24
|
||||
#define REG_OFFSET_BG2PD 0x26
|
||||
#define REG_OFFSET_BG2X_L 0x28
|
||||
#define REG_OFFSET_BG2X_H 0x2a
|
||||
#define REG_OFFSET_BG2Y_L 0x2c
|
||||
#define REG_OFFSET_BG2Y_H 0x2e
|
||||
#define REG_OFFSET_BG3PA 0x30
|
||||
#define REG_OFFSET_BG3PB 0x32
|
||||
#define REG_OFFSET_BG3PC 0x34
|
||||
#define REG_OFFSET_BG3PD 0x36
|
||||
#define REG_OFFSET_BG3X_L 0x38
|
||||
#define REG_OFFSET_BG3X_H 0x3a
|
||||
#define REG_OFFSET_BG3Y_L 0x3c
|
||||
#define REG_OFFSET_BG3Y_H 0x3e
|
||||
#define REG_OFFSET_WIN0H 0x40
|
||||
#define REG_OFFSET_WIN1H 0x42
|
||||
#define REG_OFFSET_WIN0V 0x44
|
||||
#define REG_OFFSET_WIN1V 0x46
|
||||
#define REG_OFFSET_WININ 0x48
|
||||
#define REG_OFFSET_WINOUT 0x4a
|
||||
#define REG_OFFSET_MOSAIC 0x4c
|
||||
#define REG_OFFSET_BLDCNT 0x50
|
||||
#define REG_OFFSET_BLDALPHA 0x52
|
||||
#define REG_OFFSET_BLDY 0x54
|
||||
|
||||
#define REG_OFFSET_SOUND1CNT 0x60
|
||||
#define REG_OFFSET_SOUND1CNT_L 0x60
|
||||
#define REG_OFFSET_SOUND1CNT_H 0x62
|
||||
#define REG_OFFSET_SOUND1CNT_X 0x64
|
||||
#define REG_OFFSET_SOUND2CNT 0x68
|
||||
#define REG_OFFSET_SOUND2CNT_L 0x68
|
||||
#define REG_OFFSET_SOUND2CNT_H 0x6c
|
||||
#define REG_OFFSET_SOUND3CNT 0x70
|
||||
#define REG_OFFSET_SOUND3CNT_L 0x70
|
||||
#define REG_OFFSET_SOUND3CNT_H 0x72
|
||||
#define REG_OFFSET_SOUND3CNT_X 0x74
|
||||
#define REG_OFFSET_SOUND4CNT 0x78
|
||||
#define REG_OFFSET_SOUND4CNT_L 0x78
|
||||
#define REG_OFFSET_SOUND4CNT_H 0x7c
|
||||
#define REG_OFFSET_SOUNDCNT 0x80
|
||||
#define REG_OFFSET_SOUNDCNT_L 0x80
|
||||
#define REG_OFFSET_SOUNDCNT_H 0x82
|
||||
#define REG_OFFSET_SOUNDCNT_X 0x84
|
||||
#define REG_OFFSET_SOUNDBIAS 0x88
|
||||
#define REG_OFFSET_WAVE_RAM 0x90
|
||||
#define REG_OFFSET_WAVE_RAM0 0x90
|
||||
#define REG_OFFSET_WAVE_RAM0_L 0x90
|
||||
#define REG_OFFSET_WAVE_RAM0_H 0x92
|
||||
#define REG_OFFSET_WAVE_RAM1 0x94
|
||||
#define REG_OFFSET_WAVE_RAM1_L 0x94
|
||||
#define REG_OFFSET_WAVE_RAM1_H 0x96
|
||||
#define REG_OFFSET_WAVE_RAM2 0x98
|
||||
#define REG_OFFSET_WAVE_RAM2_L 0x98
|
||||
#define REG_OFFSET_WAVE_RAM2_H 0x9a
|
||||
#define REG_OFFSET_WAVE_RAM3 0x9c
|
||||
#define REG_OFFSET_WAVE_RAM3_L 0x9c
|
||||
#define REG_OFFSET_WAVE_RAM3_H 0x9e
|
||||
#define REG_OFFSET_FIFO 0xa0
|
||||
#define REG_OFFSET_FIFO_A 0xa0
|
||||
#define REG_OFFSET_FIFO_A_L 0xa0
|
||||
#define REG_OFFSET_FIFO_A_H 0xa2
|
||||
#define REG_OFFSET_FIFO_B 0xa4
|
||||
#define REG_OFFSET_FIFO_B_L 0xa4
|
||||
#define REG_OFFSET_FIFO_B_H 0xa6
|
||||
|
||||
#define REG_OFFSET_DMA0 0xb0
|
||||
#define REG_OFFSET_DMA0SAD 0xb0
|
||||
#define REG_OFFSET_DMA0SAD_L 0xb0
|
||||
#define REG_OFFSET_DMA0SAD_H 0xb2
|
||||
#define REG_OFFSET_DMA0DAD 0xb4
|
||||
#define REG_OFFSET_DMA0DAD_L 0xb4
|
||||
#define REG_OFFSET_DMA0DAD_H 0xb6
|
||||
#define REG_OFFSET_DMA0CNT 0xb8
|
||||
#define REG_OFFSET_DMA0CNT_L 0xb8
|
||||
#define REG_OFFSET_DMA0CNT_H 0xba
|
||||
#define REG_OFFSET_DMA1 0xbc
|
||||
#define REG_OFFSET_DMA1SAD 0xbc
|
||||
#define REG_OFFSET_DMA1SAD_L 0xbc
|
||||
#define REG_OFFSET_DMA1SAD_H 0xbe
|
||||
#define REG_OFFSET_DMA1DAD 0xc0
|
||||
#define REG_OFFSET_DMA1DAD_L 0xc0
|
||||
#define REG_OFFSET_DMA1DAD_H 0xc2
|
||||
#define REG_OFFSET_DMA1CNT 0xc4
|
||||
#define REG_OFFSET_DMA1CNT_L 0xc4
|
||||
#define REG_OFFSET_DMA1CNT_H 0xc6
|
||||
#define REG_OFFSET_DMA2 0xc8
|
||||
#define REG_OFFSET_DMA2SAD 0xc8
|
||||
#define REG_OFFSET_DMA2SAD_L 0xc8
|
||||
#define REG_OFFSET_DMA2SAD_H 0xca
|
||||
#define REG_OFFSET_DMA2DAD 0xcc
|
||||
#define REG_OFFSET_DMA2DAD_L 0xcc
|
||||
#define REG_OFFSET_DMA2DAD_H 0xce
|
||||
#define REG_OFFSET_DMA2CNT 0xd0
|
||||
#define REG_OFFSET_DMA2CNT_L 0xd0
|
||||
#define REG_OFFSET_DMA2CNT_H 0xd2
|
||||
#define REG_OFFSET_DMA3 0xd4
|
||||
#define REG_OFFSET_DMA3SAD 0xd4
|
||||
#define REG_OFFSET_DMA3SAD_L 0xd4
|
||||
#define REG_OFFSET_DMA3SAD_H 0xd6
|
||||
#define REG_OFFSET_DMA3DAD 0xd8
|
||||
#define REG_OFFSET_DMA3DAD_L 0xd8
|
||||
#define REG_OFFSET_DMA3DAD_H 0xda
|
||||
#define REG_OFFSET_DMA3CNT 0xdc
|
||||
#define REG_OFFSET_DMA3CNT_L 0xdc
|
||||
#define REG_OFFSET_DMA3CNT_H 0xde
|
||||
|
||||
#define REG_OFFSET_TM0CNT 0x100
|
||||
#define REG_OFFSET_TM0CNT_L 0x100
|
||||
#define REG_OFFSET_TM0CNT_H 0x102
|
||||
#define REG_OFFSET_TM1CNT 0x104
|
||||
#define REG_OFFSET_TM1CNT_L 0x104
|
||||
#define REG_OFFSET_TM1CNT_H 0x106
|
||||
#define REG_OFFSET_TM2CNT 0x108
|
||||
#define REG_OFFSET_TM2CNT_L 0x108
|
||||
#define REG_OFFSET_TM2CNT_H 0x10a
|
||||
#define REG_OFFSET_TM3CNT 0x10c
|
||||
#define REG_OFFSET_TM3CNT_L 0x10c
|
||||
#define REG_OFFSET_TM3CNT_H 0x10e
|
||||
|
||||
#define REG_OFFSET_SIOCNT 0x128
|
||||
#define REG_OFFSET_SIODATA8 0x12a
|
||||
#define REG_OFFSET_SIODATA32 0x120
|
||||
#define REG_OFFSET_SIOMLT_SEND 0x12a
|
||||
#define REG_OFFSET_SIOMLT_RECV 0x120
|
||||
#define REG_OFFSET_SIOMULTI0 0x120
|
||||
#define REG_OFFSET_SIOMULTI1 0x122
|
||||
#define REG_OFFSET_SIOMULTI2 0x124
|
||||
#define REG_OFFSET_SIOMULTI3 0x126
|
||||
|
||||
#define REG_OFFSET_KEYINPUT 0x130
|
||||
#define REG_OFFSET_KEYCNT 0x132
|
||||
|
||||
#define REG_OFFSET_RCNT 0x134
|
||||
|
||||
#define REG_OFFSET_JOYCNT 0x140
|
||||
#define REG_OFFSET_JOYSTAT 0x158
|
||||
#define REG_OFFSET_JOY_RECV 0x150
|
||||
#define REG_OFFSET_JOY_RECV_L 0x150
|
||||
#define REG_OFFSET_JOY_RECV_H 0x152
|
||||
#define REG_OFFSET_JOY_TRANS 0x154
|
||||
#define REG_OFFSET_JOY_TRANS_L 0x154
|
||||
#define REG_OFFSET_JOY_TRANS_H 0x156
|
||||
|
||||
#define REG_OFFSET_IME 0x208
|
||||
#define REG_OFFSET_IE 0x200
|
||||
#define REG_OFFSET_IF 0x202
|
||||
|
||||
#define REG_OFFSET_WAITCNT 0x204
|
||||
|
||||
// I/O register addresses
|
||||
|
||||
#define REG_ADDR_DISPCNT (REG_BASE + REG_OFFSET_DISPCNT)
|
||||
#define REG_ADDR_DISPSTAT (REG_BASE + REG_OFFSET_DISPSTAT)
|
||||
#define REG_ADDR_VCOUNT (REG_BASE + REG_OFFSET_VCOUNT)
|
||||
#define REG_ADDR_BG0CNT (REG_BASE + REG_OFFSET_BG0CNT)
|
||||
#define REG_ADDR_BG1CNT (REG_BASE + REG_OFFSET_BG1CNT)
|
||||
#define REG_ADDR_BG2CNT (REG_BASE + REG_OFFSET_BG2CNT)
|
||||
#define REG_ADDR_BG3CNT (REG_BASE + REG_OFFSET_BG3CNT)
|
||||
#define REG_ADDR_BG0HOFS (REG_BASE + REG_OFFSET_BG0HOFS)
|
||||
#define REG_ADDR_BG0VOFS (REG_BASE + REG_OFFSET_BG0VOFS)
|
||||
#define REG_ADDR_BG1HOFS (REG_BASE + REG_OFFSET_BG1HOFS)
|
||||
#define REG_ADDR_BG1VOFS (REG_BASE + REG_OFFSET_BG1VOFS)
|
||||
#define REG_ADDR_BG2HOFS (REG_BASE + REG_OFFSET_BG2HOFS)
|
||||
#define REG_ADDR_BG2VOFS (REG_BASE + REG_OFFSET_BG2VOFS)
|
||||
#define REG_ADDR_BG3HOFS (REG_BASE + REG_OFFSET_BG3HOFS)
|
||||
#define REG_ADDR_BG3VOFS (REG_BASE + REG_OFFSET_BG3VOFS)
|
||||
#define REG_ADDR_BG2PA (REG_BASE + REG_OFFSET_BG2PA)
|
||||
#define REG_ADDR_BG2PB (REG_BASE + REG_OFFSET_BG2PB)
|
||||
#define REG_ADDR_BG2PC (REG_BASE + REG_OFFSET_BG2PC)
|
||||
#define REG_ADDR_BG2PD (REG_BASE + REG_OFFSET_BG2PD)
|
||||
#define REG_ADDR_BG2X_L (REG_BASE + REG_OFFSET_BG2X_L)
|
||||
#define REG_ADDR_BG2X_H (REG_BASE + REG_OFFSET_BG2X_H)
|
||||
#define REG_ADDR_BG2Y_L (REG_BASE + REG_OFFSET_BG2Y_L)
|
||||
#define REG_ADDR_BG2Y_H (REG_BASE + REG_OFFSET_BG2Y_H)
|
||||
#define REG_ADDR_BG3PA (REG_BASE + REG_OFFSET_BG3PA)
|
||||
#define REG_ADDR_BG3PB (REG_BASE + REG_OFFSET_BG3PB)
|
||||
#define REG_ADDR_BG3PC (REG_BASE + REG_OFFSET_BG3PC)
|
||||
#define REG_ADDR_BG3PD (REG_BASE + REG_OFFSET_BG3PD)
|
||||
#define REG_ADDR_BG3X_L (REG_BASE + REG_OFFSET_BG3X_L)
|
||||
#define REG_ADDR_BG3X_H (REG_BASE + REG_OFFSET_BG3X_H)
|
||||
#define REG_ADDR_BG3Y_L (REG_BASE + REG_OFFSET_BG3Y_L)
|
||||
#define REG_ADDR_BG3Y_H (REG_BASE + REG_OFFSET_BG3Y_H)
|
||||
#define REG_ADDR_WIN0H (REG_BASE + REG_OFFSET_WIN0H)
|
||||
#define REG_ADDR_WIN1H (REG_BASE + REG_OFFSET_WIN1H)
|
||||
#define REG_ADDR_WIN0V (REG_BASE + REG_OFFSET_WIN0V)
|
||||
#define REG_ADDR_WIN1V (REG_BASE + REG_OFFSET_WIN1V)
|
||||
#define REG_ADDR_WININ (REG_BASE + REG_OFFSET_WININ)
|
||||
#define REG_ADDR_WINOUT (REG_BASE + REG_OFFSET_WINOUT)
|
||||
#define REG_ADDR_MOSAIC (REG_BASE + REG_OFFSET_MOSAIC)
|
||||
#define REG_ADDR_BLDCNT (REG_BASE + REG_OFFSET_BLDCNT)
|
||||
#define REG_ADDR_BLDALPHA (REG_BASE + REG_OFFSET_BLDALPHA)
|
||||
#define REG_ADDR_BLDY (REG_BASE + REG_OFFSET_BLDY)
|
||||
|
||||
#define REG_ADDR_SOUND1CNT (REG_BASE + REG_OFFSET_SOUND1CNT)
|
||||
#define REG_ADDR_SOUND1CNT_L (REG_BASE + REG_OFFSET_SOUND1CNT_L)
|
||||
#define REG_ADDR_SOUND1CNT_H (REG_BASE + REG_OFFSET_SOUND1CNT_H)
|
||||
#define REG_ADDR_SOUND1CNT_X (REG_BASE + REG_OFFSET_SOUND1CNT_X)
|
||||
#define REG_ADDR_SOUND2CNT (REG_BASE + REG_OFFSET_SOUND2CNT)
|
||||
#define REG_ADDR_SOUND2CNT_L (REG_BASE + REG_OFFSET_SOUND2CNT_L)
|
||||
#define REG_ADDR_SOUND2CNT_H (REG_BASE + REG_OFFSET_SOUND2CNT_H)
|
||||
#define REG_ADDR_SOUND3CNT (REG_BASE + REG_OFFSET_SOUND3CNT)
|
||||
#define REG_ADDR_SOUND3CNT_L (REG_BASE + REG_OFFSET_SOUND3CNT_L)
|
||||
#define REG_ADDR_SOUND3CNT_H (REG_BASE + REG_OFFSET_SOUND3CNT_H)
|
||||
#define REG_ADDR_SOUND3CNT_X (REG_BASE + REG_OFFSET_SOUND3CNT_X)
|
||||
#define REG_ADDR_SOUND4CNT (REG_BASE + REG_OFFSET_SOUND4CNT)
|
||||
#define REG_ADDR_SOUND4CNT_L (REG_BASE + REG_OFFSET_SOUND4CNT_L)
|
||||
#define REG_ADDR_SOUND4CNT_H (REG_BASE + REG_OFFSET_SOUND4CNT_H)
|
||||
#define REG_ADDR_SOUNDCNT (REG_BASE + REG_OFFSET_SOUNDCNT)
|
||||
#define REG_ADDR_SOUNDCNT_L (REG_BASE + REG_OFFSET_SOUNDCNT_L)
|
||||
#define REG_ADDR_SOUNDCNT_H (REG_BASE + REG_OFFSET_SOUNDCNT_H)
|
||||
#define REG_ADDR_SOUNDCNT_X (REG_BASE + REG_OFFSET_SOUNDCNT_X)
|
||||
#define REG_ADDR_SOUNDBIAS (REG_BASE + REG_OFFSET_SOUNDBIAS)
|
||||
#define REG_ADDR_WAVE_RAM (REG_BASE + REG_OFFSET_WAVE_RAM)
|
||||
#define REG_ADDR_WAVE_RAM0 (REG_BASE + REG_OFFSET_WAVE_RAM0)
|
||||
#define REG_ADDR_WAVE_RAM0_L (REG_BASE + REG_OFFSET_WAVE_RAM0_L)
|
||||
#define REG_ADDR_WAVE_RAM0_H (REG_BASE + REG_OFFSET_WAVE_RAM0_H)
|
||||
#define REG_ADDR_WAVE_RAM1 (REG_BASE + REG_OFFSET_WAVE_RAM1)
|
||||
#define REG_ADDR_WAVE_RAM1_L (REG_BASE + REG_OFFSET_WAVE_RAM1_L)
|
||||
#define REG_ADDR_WAVE_RAM1_H (REG_BASE + REG_OFFSET_WAVE_RAM1_H)
|
||||
#define REG_ADDR_WAVE_RAM2 (REG_BASE + REG_OFFSET_WAVE_RAM2)
|
||||
#define REG_ADDR_WAVE_RAM2_L (REG_BASE + REG_OFFSET_WAVE_RAM2_L)
|
||||
#define REG_ADDR_WAVE_RAM2_H (REG_BASE + REG_OFFSET_WAVE_RAM2_H)
|
||||
#define REG_ADDR_WAVE_RAM3 (REG_BASE + REG_OFFSET_WAVE_RAM3)
|
||||
#define REG_ADDR_WAVE_RAM3_L (REG_BASE + REG_OFFSET_WAVE_RAM3_L)
|
||||
#define REG_ADDR_WAVE_RAM3_H (REG_BASE + REG_OFFSET_WAVE_RAM3_H)
|
||||
#define REG_ADDR_FIFO (REG_BASE + REG_OFFSET_FIFO)
|
||||
#define REG_ADDR_FIFO_A (REG_BASE + REG_OFFSET_FIFO_A)
|
||||
#define REG_ADDR_FIFO_A_L (REG_BASE + REG_OFFSET_FIFO_A_L)
|
||||
#define REG_ADDR_FIFO_A_H (REG_BASE + REG_OFFSET_FIFO_A_H)
|
||||
#define REG_ADDR_FIFO_B (REG_BASE + REG_OFFSET_FIFO_B)
|
||||
#define REG_ADDR_FIFO_B_L (REG_BASE + REG_OFFSET_FIFO_B_L)
|
||||
#define REG_ADDR_FIFO_B_H (REG_BASE + REG_OFFSET_FIFO_B_H)
|
||||
|
||||
#define REG_ADDR_DMA0 (REG_BASE + REG_OFFSET_DMA0)
|
||||
#define REG_ADDR_DMA0SAD (REG_BASE + REG_OFFSET_DMA0SAD)
|
||||
#define REG_ADDR_DMA0SAD_L (REG_BASE + REG_OFFSET_DMA0SAD_L)
|
||||
#define REG_ADDR_DMA0SAD_H (REG_BASE + REG_OFFSET_DMA0SAD_H)
|
||||
#define REG_ADDR_DMA0DAD (REG_BASE + REG_OFFSET_DMA0DAD)
|
||||
#define REG_ADDR_DMA0DAD_L (REG_BASE + REG_OFFSET_DMA0DAD_L)
|
||||
#define REG_ADDR_DMA0DAD_H (REG_BASE + REG_OFFSET_DMA0DAD_H)
|
||||
#define REG_ADDR_DMA0CNT (REG_BASE + REG_OFFSET_DMA0CNT)
|
||||
#define REG_ADDR_DMA0CNT_L (REG_BASE + REG_OFFSET_DMA0CNT_L)
|
||||
#define REG_ADDR_DMA0CNT_H (REG_BASE + REG_OFFSET_DMA0CNT_H)
|
||||
#define REG_ADDR_DMA1 (REG_BASE + REG_OFFSET_DMA1)
|
||||
#define REG_ADDR_DMA1SAD (REG_BASE + REG_OFFSET_DMA1SAD)
|
||||
#define REG_ADDR_DMA1SAD_L (REG_BASE + REG_OFFSET_DMA1SAD_L)
|
||||
#define REG_ADDR_DMA1SAD_H (REG_BASE + REG_OFFSET_DMA1SAD_H)
|
||||
#define REG_ADDR_DMA1DAD (REG_BASE + REG_OFFSET_DMA1DAD)
|
||||
#define REG_ADDR_DMA1DAD_L (REG_BASE + REG_OFFSET_DMA1DAD_L)
|
||||
#define REG_ADDR_DMA1DAD_H (REG_BASE + REG_OFFSET_DMA1DAD_H)
|
||||
#define REG_ADDR_DMA1CNT (REG_BASE + REG_OFFSET_DMA1CNT)
|
||||
#define REG_ADDR_DMA1CNT_L (REG_BASE + REG_OFFSET_DMA1CNT_L)
|
||||
#define REG_ADDR_DMA1CNT_H (REG_BASE + REG_OFFSET_DMA1CNT_H)
|
||||
#define REG_ADDR_DMA2 (REG_BASE + REG_OFFSET_DMA2)
|
||||
#define REG_ADDR_DMA2SAD (REG_BASE + REG_OFFSET_DMA2SAD)
|
||||
#define REG_ADDR_DMA2SAD_L (REG_BASE + REG_OFFSET_DMA2SAD_L)
|
||||
#define REG_ADDR_DMA2SAD_H (REG_BASE + REG_OFFSET_DMA2SAD_H)
|
||||
#define REG_ADDR_DMA2DAD (REG_BASE + REG_OFFSET_DMA2DAD)
|
||||
#define REG_ADDR_DMA2DAD_L (REG_BASE + REG_OFFSET_DMA2DAD_L)
|
||||
#define REG_ADDR_DMA2DAD_H (REG_BASE + REG_OFFSET_DMA2DAD_H)
|
||||
#define REG_ADDR_DMA2CNT (REG_BASE + REG_OFFSET_DMA2CNT)
|
||||
#define REG_ADDR_DMA2CNT_L (REG_BASE + REG_OFFSET_DMA2CNT_L)
|
||||
#define REG_ADDR_DMA2CNT_H (REG_BASE + REG_OFFSET_DMA2CNT_H)
|
||||
#define REG_ADDR_DMA3 (REG_BASE + REG_OFFSET_DMA3)
|
||||
#define REG_ADDR_DMA3SAD (REG_BASE + REG_OFFSET_DMA3SAD)
|
||||
#define REG_ADDR_DMA3SAD_L (REG_BASE + REG_OFFSET_DMA3SAD_L)
|
||||
#define REG_ADDR_DMA3SAD_H (REG_BASE + REG_OFFSET_DMA3SAD_H)
|
||||
#define REG_ADDR_DMA3DAD (REG_BASE + REG_OFFSET_DMA3DAD)
|
||||
#define REG_ADDR_DMA3DAD_L (REG_BASE + REG_OFFSET_DMA3DAD_L)
|
||||
#define REG_ADDR_DMA3DAD_H (REG_BASE + REG_OFFSET_DMA3DAD_H)
|
||||
#define REG_ADDR_DMA3CNT (REG_BASE + REG_OFFSET_DMA3CNT)
|
||||
#define REG_ADDR_DMA3CNT_L (REG_BASE + REG_OFFSET_DMA3CNT_L)
|
||||
#define REG_ADDR_DMA3CNT_H (REG_BASE + REG_OFFSET_DMA3CNT_H)
|
||||
|
||||
#define REG_ADDR_TM0CNT (REG_BASE + REG_OFFSET_TM0CNT)
|
||||
#define REG_ADDR_TM0CNT_L (REG_BASE + REG_OFFSET_TM0CNT_L)
|
||||
#define REG_ADDR_TM0CNT_H (REG_BASE + REG_OFFSET_TM0CNT_H)
|
||||
#define REG_ADDR_TM1CNT (REG_BASE + REG_OFFSET_TM1CNT)
|
||||
#define REG_ADDR_TM1CNT_L (REG_BASE + REG_OFFSET_TM1CNT_L)
|
||||
#define REG_ADDR_TM1CNT_H (REG_BASE + REG_OFFSET_TM1CNT_H)
|
||||
#define REG_ADDR_TM2CNT (REG_BASE + REG_OFFSET_TM2CNT)
|
||||
#define REG_ADDR_TM2CNT_L (REG_BASE + REG_OFFSET_TM2CNT_L)
|
||||
#define REG_ADDR_TM2CNT_H (REG_BASE + REG_OFFSET_TM2CNT_H)
|
||||
#define REG_ADDR_TM3CNT (REG_BASE + REG_OFFSET_TM3CNT)
|
||||
#define REG_ADDR_TM3CNT_L (REG_BASE + REG_OFFSET_TM3CNT_L)
|
||||
#define REG_ADDR_TM3CNT_H (REG_BASE + REG_OFFSET_TM3CNT_H)
|
||||
|
||||
#define REG_ADDR_SIOCNT (REG_BASE + REG_OFFSET_SIOCNT)
|
||||
#define REG_ADDR_SIODATA8 (REG_BASE + REG_OFFSET_SIODATA8)
|
||||
#define REG_ADDR_SIODATA32 (REG_BASE + REG_OFFSET_SIODATA32)
|
||||
#define REG_ADDR_SIOMLT_SEND (REG_BASE + REG_OFFSET_SIOMLT_SEND)
|
||||
#define REG_ADDR_SIOMLT_RECV (REG_BASE + REG_OFFSET_SIOMLT_RECV)
|
||||
#define REG_ADDR_SIOMULTI0 (REG_BASE + REG_OFFSET_SIOMULTI0)
|
||||
#define REG_ADDR_SIOMULTI1 (REG_BASE + REG_OFFSET_SIOMULTI1)
|
||||
#define REG_ADDR_SIOMULTI2 (REG_BASE + REG_OFFSET_SIOMULTI2)
|
||||
#define REG_ADDR_SIOMULTI3 (REG_BASE + REG_OFFSET_SIOMULTI3)
|
||||
|
||||
#define REG_ADDR_KEYINPUT (REG_BASE + REG_OFFSET_KEYINPUT)
|
||||
#define REG_ADDR_KEYCNT (REG_BASE + REG_OFFSET_KEYCNT)
|
||||
|
||||
#define REG_ADDR_RCNT (REG_BASE + REG_OFFSET_RCNT)
|
||||
|
||||
#define REG_ADDR_JOYCNT (REG_BASE + REG_OFFSET_JOYCNT)
|
||||
#define REG_ADDR_JOYSTAT (REG_BASE + REG_OFFSET_JOYSTAT)
|
||||
#define REG_ADDR_JOY_RECV (REG_BASE + REG_OFFSET_JOY_RECV)
|
||||
#define REG_ADDR_JOY_RECV_L (REG_BASE + REG_OFFSET_JOY_RECV_L)
|
||||
#define REG_ADDR_JOY_RECV_H (REG_BASE + REG_OFFSET_JOY_RECV_H)
|
||||
#define REG_ADDR_JOY_TRANS (REG_BASE + REG_OFFSET_JOY_TRANS)
|
||||
#define REG_ADDR_JOY_TRANS_L (REG_BASE + REG_OFFSET_JOY_TRANS_L)
|
||||
#define REG_ADDR_JOY_TRANS_H (REG_BASE + REG_OFFSET_JOY_TRANS_H)
|
||||
|
||||
#define REG_ADDR_IME (REG_BASE + REG_OFFSET_IME)
|
||||
#define REG_ADDR_IE (REG_BASE + REG_OFFSET_IE)
|
||||
#define REG_ADDR_IF (REG_BASE + REG_OFFSET_IF)
|
||||
|
||||
#define REG_ADDR_WAITCNT (REG_BASE + REG_OFFSET_WAITCNT)
|
||||
@ -1,5 +1,9 @@
|
||||
gHeapStart = 0x03000004;
|
||||
gHeapSize = 0x03000008;
|
||||
|
||||
gDma3Requests = 0x03000010;
|
||||
gDma3ManagerLocked = 0x03000810;
|
||||
gDma3RequestCursor = 0x03000811;
|
||||
|
||||
gGpuRegBuffer = 0x03000818;
|
||||
gGpuRegBufferLocked = 0x030008D8;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user