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define variables in gpu_regs.c

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This commit is contained in:
YamaArashi 2016-11-01 14:52:19 -07:00
parent f71ceb29b4
commit 555bbb5494
2 changed files with 37 additions and 49 deletions
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70
src/gpu_regs.c
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@ -2,16 +2,16 @@
#define GPU_REG_BUF_SIZE 0x60 #define GPU_REG_BUF_SIZE 0x60
#define GPU_REG_BUF(offset) (*(u16 *)(&gGpuRegBuffer[offset])) #define GPU_REG_BUF(offset) (*(u16 *)(&sGpuRegBuffer[offset]))
#define GPU_REG(offset) (*(vu16 *)(REG_BASE + offset)) #define GPU_REG(offset) (*(vu16 *)(REG_BASE + offset))
#define EMPTY_SLOT 0xFF #define EMPTY_SLOT 0xFF
extern u8 gGpuRegBuffer[GPU_REG_BUF_SIZE]; static u8 sGpuRegBuffer[GPU_REG_BUF_SIZE];
extern u8 gGpuRegWaitingList[GPU_REG_BUF_SIZE]; static u8 sGpuRegWaitingList[GPU_REG_BUF_SIZE];
extern bool8 gGpuRegBufferLocked; static bool8 sGpuRegBufferLocked;
extern bool8 gShouldSyncRegIE; static bool8 sShouldSyncRegIE;
extern u16 gRegIE; static u16 sRegIE;
static void CopyBufferedValueToGpuReg(u8 regOffset); static void CopyBufferedValueToGpuReg(u8 regOffset);
static void SyncRegIE(); static void SyncRegIE();
@ -22,13 +22,13 @@ void InitGpuRegManager()
s32 i; s32 i;
for (i = 0; i < GPU_REG_BUF_SIZE; i++) { for (i = 0; i < GPU_REG_BUF_SIZE; i++) {
gGpuRegBuffer[i] = 0; sGpuRegBuffer[i] = 0;
gGpuRegWaitingList[i] = EMPTY_SLOT; sGpuRegWaitingList[i] = EMPTY_SLOT;
} }
gGpuRegBufferLocked = FALSE; sGpuRegBufferLocked = FALSE;
gShouldSyncRegIE = FALSE; sShouldSyncRegIE = FALSE;
gRegIE = 0; sRegIE = 0;
} }
static void CopyBufferedValueToGpuReg(u8 regOffset) static void CopyBufferedValueToGpuReg(u8 regOffset)
@ -43,15 +43,15 @@ static void CopyBufferedValueToGpuReg(u8 regOffset)
void CopyBufferedValuesToGpuRegs() void CopyBufferedValuesToGpuRegs()
{ {
if (!gGpuRegBufferLocked) { if (!sGpuRegBufferLocked) {
s32 i; s32 i;
for (i = 0; i < GPU_REG_BUF_SIZE; i++) { for (i = 0; i < GPU_REG_BUF_SIZE; i++) {
u8 regOffset = gGpuRegWaitingList[i]; u8 regOffset = sGpuRegWaitingList[i];
if (regOffset == EMPTY_SLOT) if (regOffset == EMPTY_SLOT)
return; return;
CopyBufferedValueToGpuReg(regOffset); CopyBufferedValueToGpuReg(regOffset);
gGpuRegWaitingList[i] = EMPTY_SLOT; sGpuRegWaitingList[i] = EMPTY_SLOT;
} }
} }
} }
@ -71,17 +71,17 @@ void SetGpuReg(u8 regOffset, u16 value)
} else { } else {
s32 i; s32 i;
gGpuRegBufferLocked = TRUE; sGpuRegBufferLocked = TRUE;
for (i = 0; i < GPU_REG_BUF_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) { for (i = 0; i < GPU_REG_BUF_SIZE && sGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
if (gGpuRegWaitingList[i] == regOffset) { if (sGpuRegWaitingList[i] == regOffset) {
gGpuRegBufferLocked = FALSE; sGpuRegBufferLocked = FALSE;
return; return;
} }
} }
gGpuRegWaitingList[i] = regOffset; sGpuRegWaitingList[i] = regOffset;
gGpuRegBufferLocked = FALSE; sGpuRegBufferLocked = FALSE;
} }
} }
} }
@ -97,17 +97,17 @@ void SetGpuReg_ForcedBlank(u8 regOffset, u16 value)
} else { } else {
s32 i; s32 i;
gGpuRegBufferLocked = TRUE; sGpuRegBufferLocked = TRUE;
for (i = 0; i < GPU_REG_BUF_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) { for (i = 0; i < GPU_REG_BUF_SIZE && sGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
if (gGpuRegWaitingList[i] == regOffset) { if (sGpuRegWaitingList[i] == regOffset) {
gGpuRegBufferLocked = FALSE; sGpuRegBufferLocked = FALSE;
return; return;
} }
} }
gGpuRegWaitingList[i] = regOffset; sGpuRegWaitingList[i] = regOffset;
gGpuRegBufferLocked = FALSE; sGpuRegBufferLocked = FALSE;
} }
} }
} }
@ -137,29 +137,29 @@ void ClearGpuRegBits(u8 regOffset, u16 mask)
static void SyncRegIE() static void SyncRegIE()
{ {
if (gShouldSyncRegIE) { if (sShouldSyncRegIE) {
u16 temp = REG_IME; u16 temp = REG_IME;
REG_IME = 0; REG_IME = 0;
REG_IE = gRegIE; REG_IE = sRegIE;
REG_IME = temp; REG_IME = temp;
gShouldSyncRegIE = FALSE; sShouldSyncRegIE = FALSE;
} }
} }
void EnableInterrupts(u16 mask) void EnableInterrupts(u16 mask)
{ {
gRegIE |= mask; sRegIE |= mask;
gShouldSyncRegIE = TRUE; sShouldSyncRegIE = TRUE;
SyncRegIE(); SyncRegIE();
UpdateRegDispstatIntrBits(gRegIE); UpdateRegDispstatIntrBits(sRegIE);
} }
void DisableInterrupts(u16 mask) void DisableInterrupts(u16 mask)
{ {
gRegIE &= ~mask; sRegIE &= ~mask;
gShouldSyncRegIE = TRUE; sShouldSyncRegIE = TRUE;
SyncRegIE(); SyncRegIE();
UpdateRegDispstatIntrBits(gRegIE); UpdateRegDispstatIntrBits(sRegIE);
} }
static void UpdateRegDispstatIntrBits(u16 regIE) static void UpdateRegDispstatIntrBits(u16 regIE)

16
sym_bss.txt
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@ -22,21 +22,9 @@ gDma3ManagerLocked: @ 3000810
gDma3RequestCursor: @ 3000811 gDma3RequestCursor: @ 3000811
.space 0x7 .space 0x7
gGpuRegBuffer: @ 3000818 .include "src/gpu_regs.o"
.space 0x60
gGpuRegWaitingList: @ 3000878
.space 0x60
gGpuRegBufferLocked: @ 30008D8
.space 0x1
gShouldSyncRegIE: @ 30008D9
.space 0x1
gRegIE: @ 30008DA
.space 0x6
.align 4
gUnknown_030008E0: @ 30008E0 gUnknown_030008E0: @ 30008E0
.space 0x18 .space 0x18