From 6ac0175c1e23a686bc85743b6de34390c3d09db4 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sat, 20 Jan 2018 10:16:09 -0500 Subject: [PATCH] nonmatching sub_800FD14 --- asm/link_rfu.s | 154 ---------------------------------- include/link_rfu.h | 7 +- src/link_rfu.c | 201 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 206 insertions(+), 156 deletions(-) diff --git a/asm/link_rfu.s b/asm/link_rfu.s index 5d33cd242..2aeb664d3 100644 --- a/asm/link_rfu.s +++ b/asm/link_rfu.s @@ -5,160 +5,6 @@ .text - thumb_func_start sub_800FD14 -sub_800FD14: @ 800FD14 - push {r4,r5,lr} - lsls r0, 16 - lsrs r1, r0, 16 - ldr r5, =gSendCmd - strh r1, [r5] - movs r0, 0xF0 - lsls r0, 7 - adds r4, r5, 0 - cmp r1, r0 - beq _0800FDB0 - cmp r1, r0 - bgt _0800FD62 - movs r0, 0xBE - lsls r0, 7 - cmp r1, r0 - beq _0800FE00 - cmp r1, r0 - bgt _0800FD50 - movs r0, 0xBC - lsls r0, 6 - cmp r1, r0 - beq _0800FE20 - movs r0, 0x88 - lsls r0, 7 - cmp r1, r0 - beq _0800FE14 - b _0800FE46 - .pool -_0800FD50: - movs r0, 0xCC - lsls r0, 7 - cmp r1, r0 - beq _0800FE00 - movs r0, 0xEE - lsls r0, 7 - cmp r1, r0 - beq _0800FDB0 - b _0800FE46 -_0800FD62: - movs r0, 0xBE - lsls r0, 8 - cmp r1, r0 - beq _0800FE40 - cmp r1, r0 - bgt _0800FE46 - movs r0, 0x88 - lsls r0, 8 - cmp r1, r0 - beq _0800FD80 - movs r0, 0xA1 - lsls r0, 8 - cmp r1, r0 - beq _0800FD98 - b _0800FE46 -_0800FD80: - ldr r0, =gUnknown_03005000 - adds r1, r0, 0 - adds r1, 0x6E - ldrh r1, [r1] - strh r1, [r5, 0x2] - adds r0, 0x7D - ldrb r0, [r0] - adds r0, 0x80 - strh r0, [r5, 0x4] - b _0800FE46 - .pool -_0800FD98: - bl sub_800FC60 - lsls r0, 24 - cmp r0, 0 - beq _0800FE46 - ldr r0, =gUnknown_03005000 - adds r0, 0x5A - ldrb r0, [r0] - b _0800FE44 - .pool -_0800FDB0: - ldr r3, =gUnknown_03005000 - ldr r1, =0x00000ce2 - adds r0, r3, r1 - ldr r2, =0x00000ce3 - adds r1, r3, r2 - ldrb r2, [r0] - ldrb r0, [r1] - eors r0, r2 - ldr r1, =gUnknown_082ED695 - adds r0, r1 - ldrb r0, [r0] - adds r0, 0x1 - strb r0, [r3, 0xD] - ldrb r0, [r3, 0xD] - strh r0, [r4, 0x2] - adds r2, r4, 0x4 - movs r4, 0 - ldr r0, =0x00000cde - adds r3, r0 -_0800FDD6: - adds r1, r2, r4 - adds r0, r4, r3 - ldrb r0, [r0] - strb r0, [r1] - adds r0, r4, 0x1 - lsls r0, 24 - lsrs r4, r0, 24 - cmp r4, 0x3 - bls _0800FDD6 - b _0800FE46 - .pool -_0800FE00: - ldr r0, =gUnknown_03005000 - movs r1, 0x80 - lsls r1, 1 - adds r0, r1 - ldrh r0, [r0] - strh r0, [r4, 0x2] - b _0800FE46 - .pool -_0800FE14: - strh r1, [r5] - ldr r0, =gMain - ldrh r0, [r0, 0x2C] - b _0800FE44 - .pool -_0800FE20: - movs r4, 0 - ldr r3, =gUnknown_03005000+0xF2 -_0800FE24: - adds r2, r4, 0x1 - lsls r1, r2, 1 - adds r1, r5 - lsls r0, r4, 1 - adds r0, r3 - ldrh r0, [r0] - strh r0, [r1] - lsls r2, 24 - lsrs r4, r2, 24 - cmp r4, 0x5 - bls _0800FE24 - b _0800FE46 - .pool -_0800FE40: - ldr r0, =gUnknown_03005DA8 - ldrh r0, [r0] -_0800FE44: - strh r0, [r5, 0x2] -_0800FE46: - pop {r4,r5} - pop {r0} - bx r0 - .pool - thumb_func_end sub_800FD14 - thumb_func_start sub_800FE50 sub_800FE50: @ 800FE50 push {r4,lr} diff --git a/include/link_rfu.h b/include/link_rfu.h index 12ee00e0e..0c279f50b 100644 --- a/include/link_rfu.h +++ b/include/link_rfu.h @@ -145,7 +145,8 @@ struct UnkRfuStruct_2 { /* 0x00f */ u8 filler_0f[5]; /* 0x014 */ u8 unk_14[4][14]; /* 0x04c */ u8 unk_4c[14]; - /* 0x05a */ u8 filler_5a[2]; + /* 0x05a */ u8 unk_5a; + /* 0x05b */ u8 unk_5b; /* 0x05c */ u8 unk_5c[5]; /* 0x061 */ u8 unk_61[5]; /* 0x066 */ u8 unk_66; @@ -156,7 +157,9 @@ struct UnkRfuStruct_2 { /* 0x0e4 */ u8 unk_e4[5]; /* 0x0e9 */ u8 unk_e9[5]; /* 0x0ee */ vu8 unk_ee; - /* 0x0ef */ u8 filler_ef[0x11]; + /* 0x0ef */ u8 filler_ef[3]; + /* 0x0f2 */ u16 unk_f2[6]; + /* 0x0fe */ u8 filler_fe[2]; /* 0x100 */ u16 unk_100; /* 0x102 */ u8 unk_102; /* 0x103 */ u8 filler_103[0x21]; diff --git a/src/link_rfu.c b/src/link_rfu.c index a6ece43bb..8e2ecb5fd 100644 --- a/src/link_rfu.c +++ b/src/link_rfu.c @@ -3548,3 +3548,204 @@ u8 sub_800FCD8(void) } return flags; } + +#ifdef NONMATCHING +// The switch tree is incorrect +void sub_800FD14(u16 command) +{ + u8 i; + u8 *buff; + u8 tmp; + + gSendCmd[0] = command; + switch (command) + { + case 0x8800: + gSendCmd[1] = gUnknown_03005000.unk_6c.unk_02; + gSendCmd[2] = gUnknown_03005000.unk_6c.unk_11 + 0x80; + break; + case 0xa100: + if (sub_800FC60()) + gSendCmd[1] = gUnknown_03005000.unk_5a; + break; + case 0x7800: + case 0x7700: + tmp = gUnknown_03005000.unk_ce2 ^ gUnknown_03005000.unk_ce3; + gUnknown_03005000.playerCount = gUnknown_082ED695[tmp] + 1; + gSendCmd[1] = gUnknown_03005000.playerCount; + buff = (u8 *)(gSendCmd + 2); + for (i = 0; i < 4; i++) + buff[i] = gUnknown_03005000.unk_cde[i]; + break; + case 0x6600: + case 0x5f00: + gSendCmd[1] = gUnknown_03005000.unk_100; + break; + case 0x4400: + gSendCmd[0] = 0x4400; + gSendCmd[1] = gMain.heldKeys; + break; + case 0x2f00: + for (i = 0; i < 6; i++) + gSendCmd[1 + i] = gUnknown_03005000.unk_f2[i]; + break; + case 0xbe00: + gSendCmd[1] = gUnknown_03005DA8; + break; + } +} +#else +__attribute__((naked)) void sub_800FD14(u16 command) +{ + asm_unified("\tpush {r4,r5,lr}\n" + "\tlsls r0, 16\n" + "\tlsrs r1, r0, 16\n" + "\tldr r5, =gSendCmd\n" + "\tstrh r1, [r5]\n" + "\tmovs r0, 0xF0\n" + "\tlsls r0, 7\n" + "\tadds r4, r5, 0\n" + "\tcmp r1, r0\n" + "\tbeq _0800FDB0_case_7700_case_7800\n" + "\tcmp r1, r0\n" + "\tbgt _0800FD62\n" + "\tmovs r0, 0xBE\n" + "\tlsls r0, 7\n" + "\tcmp r1, r0\n" + "\tbeq _0800FE00_case_5f00_case_6600\n" + "\tcmp r1, r0\n" + "\tbgt _0800FD50\n" + "\tmovs r0, 0xBC\n" + "\tlsls r0, 6\n" + "\tcmp r1, r0\n" + "\tbeq _0800FE20_case_2f00\n" + "\tmovs r0, 0x88\n" + "\tlsls r0, 7\n" + "\tcmp r1, r0\n" + "\tbeq _0800FE14_case_4400\n" + "\tb _0800FE46_break\n" + "\t.pool\n" + "_0800FD50:\n" + "\tmovs r0, 0xCC\n" + "\tlsls r0, 7\n" + "\tcmp r1, r0\n" + "\tbeq _0800FE00_case_5f00_case_6600\n" + "\tmovs r0, 0xEE\n" + "\tlsls r0, 7\n" + "\tcmp r1, r0\n" + "\tbeq _0800FDB0_case_7700_case_7800\n" + "\tb _0800FE46_break\n" + "_0800FD62:\n" + "\tmovs r0, 0xBE\n" + "\tlsls r0, 8\n" + "\tcmp r1, r0\n" + "\tbeq _0800FE40_case_be00\n" + "\tcmp r1, r0\n" + "\tbgt _0800FE46_break\n" + "\tmovs r0, 0x88\n" + "\tlsls r0, 8\n" + "\tcmp r1, r0\n" + "\tbeq _0800FD80_case_8800\n" + "\tmovs r0, 0xA1\n" + "\tlsls r0, 8\n" + "\tcmp r1, r0\n" + "\tbeq _0800FD98_case_a100\n" + "\tb _0800FE46_break\n" + "_0800FD80_case_8800:\n" + "\tldr r0, =gUnknown_03005000\n" + "\tadds r1, r0, 0\n" + "\tadds r1, 0x6E\n" + "\tldrh r1, [r1]\n" + "\tstrh r1, [r5, 0x2]\n" + "\tadds r0, 0x7D\n" + "\tldrb r0, [r0]\n" + "\tadds r0, 0x80\n" + "\tstrh r0, [r5, 0x4]\n" + "\tb _0800FE46_break\n" + "\t.pool\n" + "_0800FD98_case_a100:\n" + "\tbl sub_800FC60\n" + "\tlsls r0, 24\n" + "\tcmp r0, 0\n" + "\tbeq _0800FE46_break\n" + "\tldr r0, =gUnknown_03005000\n" + "\tadds r0, 0x5A\n" + "\tldrb r0, [r0]\n" + "\tb _0800FE44_str_break\n" + "\t.pool\n" + "_0800FDB0_case_7700_case_7800:\n" + "\tldr r3, =gUnknown_03005000\n" + "\tldr r1, =0x00000ce2\n" + "\tadds r0, r3, r1\n" + "\tldr r2, =0x00000ce3\n" + "\tadds r1, r3, r2\n" + "\tldrb r2, [r0]\n" + "\tldrb r0, [r1]\n" + "\teors r0, r2\n" + "\tldr r1, =gUnknown_082ED695\n" + "\tadds r0, r1\n" + "\tldrb r0, [r0]\n" + "\tadds r0, 0x1\n" + "\tstrb r0, [r3, 0xD]\n" + "\tldrb r0, [r3, 0xD]\n" + "\tstrh r0, [r4, 0x2]\n" + "\tadds r2, r4, 0x4\n" + "\tmovs r4, 0\n" + "\tldr r0, =0x00000cde\n" + "\tadds r3, r0\n" + "_0800FDD6:\n" + "\tadds r1, r2, r4\n" + "\tadds r0, r4, r3\n" + "\tldrb r0, [r0]\n" + "\tstrb r0, [r1]\n" + "\tadds r0, r4, 0x1\n" + "\tlsls r0, 24\n" + "\tlsrs r4, r0, 24\n" + "\tcmp r4, 0x3\n" + "\tbls _0800FDD6\n" + "\tb _0800FE46_break\n" + "\t.pool\n" + "_0800FE00_case_5f00_case_6600:\n" + "\tldr r0, =gUnknown_03005000\n" + "\tmovs r1, 0x80\n" + "\tlsls r1, 1\n" + "\tadds r0, r1\n" + "\tldrh r0, [r0]\n" + "\tstrh r0, [r4, 0x2]\n" + "\tb _0800FE46_break\n" + "\t.pool\n" + "_0800FE14_case_4400:\n" + "\tstrh r1, [r5]\n" + "\tldr r0, =gMain\n" + "\tldrh r0, [r0, 0x2C]\n" + "\tb _0800FE44_str_break\n" + "\t.pool\n" + "_0800FE20_case_2f00:\n" + "\tmovs r4, 0\n" + "\tldr r3, =gUnknown_03005000+0xF2\n" + "_0800FE24:\n" + "\tadds r2, r4, 0x1\n" + "\tlsls r1, r2, 1\n" + "\tadds r1, r5\n" + "\tlsls r0, r4, 1\n" + "\tadds r0, r3\n" + "\tldrh r0, [r0]\n" + "\tstrh r0, [r1]\n" + "\tlsls r2, 24\n" + "\tlsrs r4, r2, 24\n" + "\tcmp r4, 0x5\n" + "\tbls _0800FE24\n" + "\tb _0800FE46_break\n" + "\t.pool\n" + "_0800FE40_case_be00:\n" + "\tldr r0, =gUnknown_03005DA8\n" + "\tldrh r0, [r0]\n" + "_0800FE44_str_break:\n" + "\tstrh r0, [r5, 0x2]\n" + "_0800FE46_break:\n" + "\tpop {r4,r5}\n" + "\tpop {r0}\n" + "\tbx r0\n" + "\t.pool"); +} +#endif