mirror of
https://github.com/Ninjdai1/pokeemerald.git
synced 2024-09-28 16:54:29 +02:00
gpu_regs.c
This commit is contained in:
YamaArashi
parent
4e95a13295
commit
b4781cdf03
1
.gitattributes
vendored
1
.gitattributes
vendored
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@ -6,6 +6,7 @@ Makefile text eol=lf
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*.mk text eol=lf
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*.c text eol=lf
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*.h text eol=lf
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*.pl text eol=lf
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*.png binary
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*.bin binary
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16
Makefile
16
Makefile
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@ -23,6 +23,10 @@ SCANINC := tools/scaninc/scaninc
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CSRCS := $(wildcard src/*.c)
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OBJS := asm/emerald.o
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$(foreach obj, $(OBJS), \
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$(eval $(obj)_deps := $(shell $(SCANINC) $(obj:.o=.s))) \
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)
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ROM := pokeemerald.gba
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ELF := $(ROM:.gba=.elf)
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@ -55,12 +59,7 @@ include graphics_file_rules.mk
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%.gbapal: %.pal ; $(GFX) $< $@
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%.lz: % ; $(GFX) $< $@
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deps: $(CSRCS:src/%.c=genasm/%.s)
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$(foreach obj, $(OBJS), \
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$(eval $(obj)_deps := $(shell $(SCANINC) $(obj:.o=.s))) \
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)
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$(OBJS): deps
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$(OBJS): $(CSRCS:src/%.c=genasm/%.s)
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# TODO: fix this .syntax hack
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@ -73,8 +72,9 @@ genasm/suffix.tmp:
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genasm/%.s: src/%.c genasm/prefix.tmp genasm/suffix.tmp
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mkdir -p genasm
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$(CC) $(CFLAGS) -o $@.tmp $< -S
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cat genasm/prefix.tmp $@.tmp genasm/suffix.tmp >$@
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$(RM) $@.tmp
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cat genasm/prefix.tmp $@.tmp genasm/suffix.tmp >$@.tmp2
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perl fix_local_labels.pl $@.tmp2 $@
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$(RM) $@.tmp $@.tmp2
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%.o: %.s $$($$@_deps)
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$(AS) $(ASFLAGS) -o $@ $<
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@ -15,7 +15,7 @@ Start:
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.include "asm/main.s"
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.include "genasm/malloc.s"
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.include "asm/dma3_manager.s"
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.include "asm/gpu_reg_manager.s"
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.include "genasm/gpu_regs.s"
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.include "asm/gpu_bg.s"
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.include "asm/pixel_buffer.s"
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.include "asm/window.s"
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@ -1,410 +0,0 @@
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thumb_func_start InitGpuRegManager
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; void InitGpuRegManager()
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InitGpuRegManager: ; 8000FE4
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push {r4-r7,lr}
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mov r7, r8
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push {r7}
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movs r2, 0
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ldr r7, =0x030008d8
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ldr r0, =0x030008d9
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mov r12, r0
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ldr r1, =0x030008da
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mov r8, r1
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ldr r6, =0x03000818
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movs r5, 0
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ldr r4, =0x03000878
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movs r3, 0xFF
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_08000FFE:
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adds r0, r2, r6
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strb r5, [r0]
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adds r1, r2, r4
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ldrb r0, [r1]
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orrs r0, r3
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strb r0, [r1]
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adds r2, 0x1
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cmp r2, 0x5F
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ble _08000FFE
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movs r0, 0
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strb r0, [r7]
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mov r1, r12
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strb r0, [r1]
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movs r0, 0
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mov r1, r8
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strh r0, [r1]
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pop {r3}
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mov r8, r3
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pop {r4-r7}
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pop {r0}
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bx r0
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.pool
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thumb_func_end InitGpuRegManager
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thumb_func_start CopyBufferedValueToGpuReg
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; void CopyBufferedValueToGpuReg(u8 reg)
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CopyBufferedValueToGpuReg: ; 800103C
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push {lr}
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lsls r0, 24
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lsrs r2, r0, 24
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cmp r2, 0x4
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bne _08001068
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ldr r2, =0x04000004
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ldrh r1, [r2]
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ldr r0, =0x0000ffe7
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ands r0, r1
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strh r0, [r2]
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ldr r1, =0x0300081c
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ldrh r0, [r2]
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ldrh r1, [r1]
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orrs r0, r1
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strh r0, [r2]
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b _08001076
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.pool
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_08001068:
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movs r0, 0x80
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lsls r0, 19
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adds r0, r2, r0
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ldr r1, =0x03000818
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adds r1, r2, r1
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ldrh r1, [r1]
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strh r1, [r0]
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_08001076:
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pop {r0}
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bx r0
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.pool
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thumb_func_end CopyBufferedValueToGpuReg
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thumb_func_start CopyBufferedValuesToGpuRegs
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; void CopyBufferedValuesToGpuRegs()
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CopyBufferedValuesToGpuRegs: ; 8001080
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push {r4,r5,lr}
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ldr r0, =0x030008d8
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ldrb r0, [r0]
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cmp r0, 0
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bne _080010A4
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movs r5, 0
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_0800108C:
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ldr r0, =0x03000878
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adds r4, r5, r0
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ldrb r0, [r4]
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cmp r0, 0xFF
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beq _080010A4
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bl CopyBufferedValueToGpuReg
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movs r0, 0xFF
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strb r0, [r4]
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adds r5, 0x1
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cmp r5, 0x5F
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ble _0800108C
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_080010A4:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end CopyBufferedValuesToGpuRegs
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thumb_func_start SetGpuReg
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; void SetGpuReg(u8 reg, u16 value)
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SetGpuReg: ; 80010B4
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push {r4,r5,lr}
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lsls r0, 24
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lsrs r4, r0, 24
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lsls r1, 16
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lsrs r1, 16
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cmp r4, 0x5F
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bhi _08001130
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ldr r0, =0x03000818
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adds r0, r4, r0
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strh r1, [r0]
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ldr r0, =0x04000006
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ldrh r1, [r0]
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movs r0, 0xFF
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ands r0, r1
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subs r0, 0xA1
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lsls r0, 16
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lsrs r0, 16
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cmp r0, 0x40
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bls _080010E8
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movs r0, 0x80
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lsls r0, 19
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ldrh r1, [r0]
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movs r0, 0x80
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ands r0, r1
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cmp r0, 0
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beq _080010FE
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_080010E8:
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adds r0, r4, 0
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bl CopyBufferedValueToGpuReg
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b _08001130
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.pool
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_080010F8:
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movs r0, 0
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strb r0, [r5]
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b _08001130
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_080010FE:
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ldr r2, =0x030008d8
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movs r0, 0x1
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strb r0, [r2]
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movs r3, 0
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ldr r0, =0x03000878
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ldrb r1, [r0]
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adds r5, r2, 0
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adds r2, r0, 0
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cmp r1, 0xFF
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beq _08001128
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adds r1, r2, 0
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_08001114:
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ldrb r0, [r1]
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cmp r0, r4
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beq _080010F8
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adds r1, 0x1
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adds r3, 0x1
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cmp r3, 0x5F
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bgt _08001128
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ldrb r0, [r1]
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cmp r0, 0xFF
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bne _08001114
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_08001128:
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adds r0, r3, r2
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movs r1, 0
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strb r4, [r0]
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strb r1, [r5]
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_08001130:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetGpuReg
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thumb_func_start SetGpuReg_ForcedBlank
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; void SetGpuReg_ForcedBlank(u8 reg, u16 value)
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SetGpuReg_ForcedBlank: ; 8001140
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push {r4,r5,lr}
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lsls r0, 24
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lsrs r4, r0, 24
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lsls r1, 16
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lsrs r1, 16
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cmp r4, 0x5F
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bhi _080011A8
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ldr r0, =0x03000818
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adds r0, r4, r0
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strh r1, [r0]
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movs r0, 0x80
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lsls r0, 19
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ldrh r1, [r0]
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movs r0, 0x80
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ands r0, r1
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cmp r0, 0
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beq _08001176
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adds r0, r4, 0
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bl CopyBufferedValueToGpuReg
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b _080011A8
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.pool
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_08001170:
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movs r0, 0
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strb r0, [r5]
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b _080011A8
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_08001176:
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ldr r2, =0x030008d8
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movs r0, 0x1
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strb r0, [r2]
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movs r3, 0
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ldr r0, =0x03000878
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ldrb r1, [r0]
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adds r5, r2, 0
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adds r2, r0, 0
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cmp r1, 0xFF
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beq _080011A0
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adds r1, r2, 0
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_0800118C:
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ldrb r0, [r1]
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cmp r0, r4
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beq _08001170
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adds r1, 0x1
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adds r3, 0x1
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cmp r3, 0x5F
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bgt _080011A0
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ldrb r0, [r1]
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cmp r0, 0xFF
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bne _0800118C
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_080011A0:
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adds r0, r3, r2
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movs r1, 0
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strb r4, [r0]
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strb r1, [r5]
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_080011A8:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetGpuReg_ForcedBlank
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thumb_func_start GetGpuReg
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; u16 GetGpuReg(u8 reg)
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GetGpuReg: ; 80011B8
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push {lr}
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lsls r0, 24
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lsrs r0, 24
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adds r1, r0, 0
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cmp r1, 0x4
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bne _080011CC
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ldr r0, =0x04000004
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b _080011DE
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.pool
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_080011CC:
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cmp r1, 0x6
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beq _080011DC
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ldr r0, =0x03000818
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adds r0, r1, r0
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ldrh r0, [r0]
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b _080011E0
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.pool
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_080011DC:
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ldr r0, =0x04000006
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_080011DE:
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ldrh r0, [r0]
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_080011E0:
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pop {r1}
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bx r1
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.pool
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thumb_func_end GetGpuReg
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thumb_func_start SetGpuRegBits
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; void SetGpuRegBits(u8 reg, u16 mask)
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SetGpuRegBits: ; 80011E8
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push {lr}
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adds r2, r1, 0
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lsls r0, 24
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lsrs r0, 24
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ldr r1, =0x03000818
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adds r1, r0, r1
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ldrh r1, [r1]
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orrs r1, r2
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lsls r1, 16
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lsrs r1, 16
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bl SetGpuReg
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetGpuRegBits
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thumb_func_start ClearGpuRegBits
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; void ClearGpuRegBits(u8 reg, u16 mask)
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ClearGpuRegBits: ; 8001208
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push {lr}
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adds r2, r1, 0
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lsls r0, 24
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lsrs r0, 24
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lsls r2, 16
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ldr r1, =0x03000818
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adds r1, r0, r1
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ldrh r1, [r1]
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lsrs r2, 16
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bics r1, r2
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bl SetGpuReg
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pop {r0}
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bx r0
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.pool
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thumb_func_end ClearGpuRegBits
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thumb_func_start SyncRegIE
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; void SyncRegIE()
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SyncRegIE: ; 8001228
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push {r4,r5,lr}
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ldr r5, =0x030008d9
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ldrb r0, [r5]
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cmp r0, 0
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beq _08001246
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ldr r2, =0x04000208
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ldrh r1, [r2]
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movs r4, 0
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strh r4, [r2]
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ldr r3, =0x04000200
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ldr r0, =0x030008da
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ldrh r0, [r0]
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strh r0, [r3]
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strh r1, [r2]
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strb r4, [r5]
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_08001246:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end SyncRegIE
|
||||
|
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thumb_func_start EnableInterrupts
|
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; void EnableInterrupts(u16 mask)
|
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EnableInterrupts: ; 800125C
|
||||
push {r4,lr}
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lsls r0, 16
|
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lsrs r0, 16
|
||||
ldr r4, =0x030008da
|
||||
ldrh r1, [r4]
|
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orrs r0, r1
|
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strh r0, [r4]
|
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ldr r1, =0x030008d9
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movs r0, 0x1
|
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strb r0, [r1]
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bl SyncRegIE
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ldrh r0, [r4]
|
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bl UpdateRegDispstatIntrBits
|
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pop {r4}
|
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pop {r0}
|
||||
bx r0
|
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.pool
|
||||
thumb_func_end EnableInterrupts
|
||||
|
||||
thumb_func_start DisableInterrupts
|
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; void DisableInterrupts(u16 mask)
|
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DisableInterrupts: ; 8001288
|
||||
push {r4,lr}
|
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lsls r0, 16
|
||||
lsrs r0, 16
|
||||
ldr r4, =0x030008da
|
||||
ldrh r1, [r4]
|
||||
bics r1, r0
|
||||
strh r1, [r4]
|
||||
ldr r1, =0x030008d9
|
||||
movs r0, 0x1
|
||||
strb r0, [r1]
|
||||
bl SyncRegIE
|
||||
ldrh r0, [r4]
|
||||
bl UpdateRegDispstatIntrBits
|
||||
pop {r4}
|
||||
pop {r0}
|
||||
bx r0
|
||||
.pool
|
||||
thumb_func_end DisableInterrupts
|
||||
|
||||
thumb_func_start UpdateRegDispstatIntrBits
|
||||
; void UpdateRegDispstatIntrBits(u16 mask)
|
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UpdateRegDispstatIntrBits: ; 80012B4
|
||||
push {r4,lr}
|
||||
adds r4, r0, 0
|
||||
lsls r4, 16
|
||||
lsrs r4, 16
|
||||
movs r0, 0x4
|
||||
bl GetGpuReg
|
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movs r2, 0x18
|
||||
ands r2, r0
|
||||
movs r1, 0x1
|
||||
ands r1, r4
|
||||
negs r0, r1
|
||||
orrs r0, r1
|
||||
asrs r1, r0, 31
|
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movs r0, 0x8
|
||||
ands r1, r0
|
||||
movs r0, 0x2
|
||||
ands r0, r4
|
||||
cmp r0, 0
|
||||
beq _080012E0
|
||||
movs r0, 0x10
|
||||
orrs r1, r0
|
||||
_080012E0:
|
||||
cmp r2, r1
|
||||
beq _080012EA
|
||||
movs r0, 0x4
|
||||
bl SetGpuReg
|
||||
_080012EA:
|
||||
pop {r4}
|
||||
pop {r0}
|
||||
bx r0
|
||||
thumb_func_end UpdateRegDispstatIntrBits
|
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28
fix_local_labels.pl
Normal file
28
fix_local_labels.pl
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
use strict;
|
||||
use warnings;
|
||||
|
||||
open(IN_FILE, $ARGV[0]);
|
||||
open(OUT_FILE, ">", $ARGV[1]);
|
||||
|
||||
my @labels = ();
|
||||
|
||||
while (<IN_FILE>) {
|
||||
if ($_ =~ /^\.(.+):/) {
|
||||
push(@labels, $1);
|
||||
}
|
||||
}
|
||||
|
||||
seek IN_FILE, 0, 0;
|
||||
|
||||
while (<IN_FILE>) {
|
||||
for (my $i = 0; $i < scalar(@labels); $i++) {
|
||||
my $find = quotemeta '.' . $labels[$i];
|
||||
my $replace = '$' . $labels[$i];
|
||||
$_ =~ s/$find/$replace/;
|
||||
}
|
||||
|
||||
print OUT_FILE $_;
|
||||
}
|
||||
|
||||
close(IN_FILE);
|
||||
close(OUT_FILE);
|
||||
|
|
@ -36,234 +36,234 @@ $(monpaldir)/castform_shiny_palette.gbapal: $(monpaldir)/castform_normal_form_sh
|
|||
tilesetdir := data/graphics/tilesets
|
||||
|
||||
$(tilesetdir)/secondary/petalburg/tiles.4bpp: $(tilesetdir)/secondary/petalburg/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 159
|
||||
$(GFX) $< $@ -num_tiles 159
|
||||
|
||||
$(tilesetdir)/secondary/rustboro/tiles.4bpp: $(tilesetdir)/secondary/rustboro/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 498
|
||||
$(GFX) $< $@ -num_tiles 498
|
||||
|
||||
$(tilesetdir)/secondary/dewford/tiles.4bpp: $(tilesetdir)/secondary/dewford/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 503
|
||||
$(GFX) $< $@ -num_tiles 503
|
||||
|
||||
$(tilesetdir)/secondary/slateport/tiles.4bpp: $(tilesetdir)/secondary/slateport/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 504
|
||||
$(GFX) $< $@ -num_tiles 504
|
||||
|
||||
$(tilesetdir)/secondary/mauville/tiles.4bpp: $(tilesetdir)/secondary/mauville/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 503
|
||||
$(GFX) $< $@ -num_tiles 503
|
||||
|
||||
$(tilesetdir)/secondary/lavaridge/tiles.4bpp: $(tilesetdir)/secondary/lavaridge/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 450
|
||||
$(GFX) $< $@ -num_tiles 450
|
||||
|
||||
$(tilesetdir)/secondary/fortree/tiles.4bpp: $(tilesetdir)/secondary/fortree/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 493
|
||||
$(GFX) $< $@ -num_tiles 493
|
||||
|
||||
$(tilesetdir)/secondary/pacifidlog/tiles.4bpp: $(tilesetdir)/secondary/pacifidlog/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 504
|
||||
$(GFX) $< $@ -num_tiles 504
|
||||
|
||||
$(tilesetdir)/secondary/sootopolis/tiles.4bpp: $(tilesetdir)/secondary/sootopolis/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 328
|
||||
$(GFX) $< $@ -num_tiles 328
|
||||
|
||||
$(tilesetdir)/secondary/battle_frontier_outside_west/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier_outside_west/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 508
|
||||
$(GFX) $< $@ -num_tiles 508
|
||||
|
||||
$(tilesetdir)/secondary/battle_frontier_outside_east/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier_outside_east/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 508
|
||||
$(GFX) $< $@ -num_tiles 508
|
||||
|
||||
$(tilesetdir)/primary/inside_building/tiles.4bpp: $(tilesetdir)/primary/inside_building/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 502
|
||||
$(GFX) $< $@ -num_tiles 502
|
||||
|
||||
$(tilesetdir)/secondary/shop/tiles.4bpp: $(tilesetdir)/secondary/shop/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 502
|
||||
$(GFX) $< $@ -num_tiles 502
|
||||
|
||||
$(tilesetdir)/secondary/pokemon_center/tiles.4bpp: $(tilesetdir)/secondary/pokemon_center/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 478
|
||||
$(GFX) $< $@ -num_tiles 478
|
||||
|
||||
$(tilesetdir)/secondary/cave/tiles.4bpp: $(tilesetdir)/secondary/cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 425
|
||||
$(GFX) $< $@ -num_tiles 425
|
||||
|
||||
$(tilesetdir)/secondary/pokemon_school/tiles.4bpp: $(tilesetdir)/secondary/pokemon_school/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 278
|
||||
$(GFX) $< $@ -num_tiles 278
|
||||
|
||||
$(tilesetdir)/secondary/pokemon_fan_club/tiles.4bpp: $(tilesetdir)/secondary/pokemon_fan_club/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 319
|
||||
$(GFX) $< $@ -num_tiles 319
|
||||
|
||||
$(tilesetdir)/secondary/unused_1/tiles.4bpp: $(tilesetdir)/secondary/unused_1/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 17
|
||||
$(GFX) $< $@ -num_tiles 17
|
||||
|
||||
$(tilesetdir)/secondary/meteor_falls/tiles.4bpp: $(tilesetdir)/secondary/meteor_falls/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 460
|
||||
$(GFX) $< $@ -num_tiles 460
|
||||
|
||||
$(tilesetdir)/secondary/oceanic_museum/tiles.4bpp: $(tilesetdir)/secondary/oceanic_museum/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 319
|
||||
$(GFX) $< $@ -num_tiles 319
|
||||
|
||||
$(tilesetdir)/secondary/cable_club/unknown_tiles.4bpp: $(tilesetdir)/secondary/cable_club/unknown_tiles.png
|
||||
$(gfx) $< $@ -num_tiles 120
|
||||
$(GFX) $< $@ -num_tiles 120
|
||||
|
||||
$(tilesetdir)/secondary/seashore_house/tiles.4bpp: $(tilesetdir)/secondary/seashore_house/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 312
|
||||
$(GFX) $< $@ -num_tiles 312
|
||||
|
||||
$(tilesetdir)/secondary/pretty_petal_flower_shop/tiles.4bpp: $(tilesetdir)/secondary/pretty_petal_flower_shop/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 345
|
||||
$(GFX) $< $@ -num_tiles 345
|
||||
|
||||
$(tilesetdir)/secondary/pokemon_day_care/tiles.4bpp: $(tilesetdir)/secondary/pokemon_day_care/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 355
|
||||
$(GFX) $< $@ -num_tiles 355
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/brown_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/brown_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 82
|
||||
$(GFX) $< $@ -num_tiles 82
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/tree/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/tree/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 82
|
||||
$(GFX) $< $@ -num_tiles 82
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/shrub/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/shrub/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 82
|
||||
$(GFX) $< $@ -num_tiles 82
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/blue_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/blue_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 82
|
||||
$(GFX) $< $@ -num_tiles 82
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/yellow_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/yellow_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 82
|
||||
$(GFX) $< $@ -num_tiles 82
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/red_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/red_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 82
|
||||
$(GFX) $< $@ -num_tiles 82
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/brown_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/brown_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 83
|
||||
$(GFX) $< $@ -num_tiles 83
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/tree/tiles.4bpp: $(tilesetdir)/secondary/secret_base/tree/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 83
|
||||
$(GFX) $< $@ -num_tiles 83
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/shrub/tiles.4bpp: $(tilesetdir)/secondary/secret_base/shrub/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 83
|
||||
$(GFX) $< $@ -num_tiles 83
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/blue_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/blue_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 83
|
||||
$(GFX) $< $@ -num_tiles 83
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/yellow_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/yellow_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 83
|
||||
$(GFX) $< $@ -num_tiles 83
|
||||
|
||||
$(tilesetdir)/secondary/secret_base/red_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/red_cave/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 83
|
||||
$(GFX) $< $@ -num_tiles 83
|
||||
|
||||
$(tilesetdir)/secondary/inside_of_truck/tiles.4bpp: $(tilesetdir)/secondary/inside_of_truck/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 62
|
||||
$(GFX) $< $@ -num_tiles 62
|
||||
|
||||
$(tilesetdir)/secondary/contest/tiles.4bpp: $(tilesetdir)/secondary/contest/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 430
|
||||
$(GFX) $< $@ -num_tiles 430
|
||||
|
||||
$(tilesetdir)/secondary/lilycove_museum/tiles.4bpp: $(tilesetdir)/secondary/lilycove_museum/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 431
|
||||
$(GFX) $< $@ -num_tiles 431
|
||||
|
||||
$(tilesetdir)/secondary/lab/tiles.4bpp: $(tilesetdir)/secondary/lab/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 500
|
||||
$(GFX) $< $@ -num_tiles 500
|
||||
|
||||
$(tilesetdir)/secondary/underwater/tiles.4bpp: $(tilesetdir)/secondary/underwater/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 500
|
||||
$(GFX) $< $@ -num_tiles 500
|
||||
|
||||
$(tilesetdir)/secondary/generic_building/tiles.4bpp: $(tilesetdir)/secondary/generic_building/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 509
|
||||
$(GFX) $< $@ -num_tiles 509
|
||||
|
||||
$(tilesetdir)/secondary/mauville_game_corner/tiles.4bpp: $(tilesetdir)/secondary/mauville_game_corner/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 469
|
||||
$(GFX) $< $@ -num_tiles 469
|
||||
|
||||
$(tilesetdir)/secondary/unused_2/tiles.4bpp: $(tilesetdir)/secondary/unused_2/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 150
|
||||
$(GFX) $< $@ -num_tiles 150
|
||||
|
||||
$(tilesetdir)/secondary/rustboro_gym/tiles.4bpp: $(tilesetdir)/secondary/rustboro_gym/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 60
|
||||
$(GFX) $< $@ -num_tiles 60
|
||||
|
||||
$(tilesetdir)/secondary/dewford_gym/tiles.4bpp: $(tilesetdir)/secondary/dewford_gym/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 61
|
||||
$(GFX) $< $@ -num_tiles 61
|
||||
|
||||
$(tilesetdir)/secondary/lavaridge_gym/tiles.4bpp: $(tilesetdir)/secondary/lavaridge_gym/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 54
|
||||
$(GFX) $< $@ -num_tiles 54
|
||||
|
||||
$(tilesetdir)/secondary/petalburg_gym/tiles.4bpp: $(tilesetdir)/secondary/petalburg_gym/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 148
|
||||
$(GFX) $< $@ -num_tiles 148
|
||||
|
||||
$(tilesetdir)/secondary/fortree_gym/tiles.4bpp: $(tilesetdir)/secondary/fortree_gym/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 61
|
||||
$(GFX) $< $@ -num_tiles 61
|
||||
|
||||
$(tilesetdir)/secondary/mossdeep_gym/tiles.4bpp: $(tilesetdir)/secondary/mossdeep_gym/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 82
|
||||
$(GFX) $< $@ -num_tiles 82
|
||||
|
||||
$(tilesetdir)/secondary/sootopolis_gym/tiles.4bpp: $(tilesetdir)/secondary/sootopolis_gym/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 484
|
||||
$(GFX) $< $@ -num_tiles 484
|
||||
|
||||
$(tilesetdir)/secondary/trick_house_puzzle/tiles.4bpp: $(tilesetdir)/secondary/trick_house_puzzle/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 294
|
||||
$(GFX) $< $@ -num_tiles 294
|
||||
|
||||
$(tilesetdir)/secondary/inside_ship/tiles.4bpp: $(tilesetdir)/secondary/inside_ship/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 342
|
||||
$(GFX) $< $@ -num_tiles 342
|
||||
|
||||
$(tilesetdir)/secondary/elite_four/tiles.4bpp: $(tilesetdir)/secondary/elite_four/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 505
|
||||
$(GFX) $< $@ -num_tiles 505
|
||||
|
||||
$(tilesetdir)/secondary/battle_frontier/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 310
|
||||
$(GFX) $< $@ -num_tiles 310
|
||||
|
||||
$(tilesetdir)/secondary/battle_factory/tiles.4bpp: $(tilesetdir)/secondary/battle_factory/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 424
|
||||
$(GFX) $< $@ -num_tiles 424
|
||||
|
||||
$(tilesetdir)/secondary/battle_pike/tiles.4bpp: $(tilesetdir)/secondary/battle_pike/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 382
|
||||
$(GFX) $< $@ -num_tiles 382
|
||||
|
||||
$(tilesetdir)/secondary/mirage_tower/tiles.4bpp: $(tilesetdir)/secondary/mirage_tower/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 420
|
||||
$(GFX) $< $@ -num_tiles 420
|
||||
|
||||
$(tilesetdir)/secondary/mossdeep_game_corner/tiles.4bpp: $(tilesetdir)/secondary/mossdeep_game_corner/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 95
|
||||
$(GFX) $< $@ -num_tiles 95
|
||||
|
||||
$(tilesetdir)/secondary/island_harbor/tiles.4bpp: $(tilesetdir)/secondary/island_harbor/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 503
|
||||
$(GFX) $< $@ -num_tiles 503
|
||||
|
||||
$(tilesetdir)/secondary/trainer_hill/tiles.4bpp: $(tilesetdir)/secondary/trainer_hill/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 374
|
||||
$(GFX) $< $@ -num_tiles 374
|
||||
|
||||
$(tilesetdir)/secondary/navel_rock/tiles.4bpp: $(tilesetdir)/secondary/navel_rock/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 420
|
||||
$(GFX) $< $@ -num_tiles 420
|
||||
|
||||
$(tilesetdir)/secondary/battle_frontier_ranking_hall/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier_ranking_hall/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 136
|
||||
$(GFX) $< $@ -num_tiles 136
|
||||
|
||||
$(tilesetdir)/secondary/mystery_events_house/tiles.4bpp: $(tilesetdir)/secondary/mystery_events_house/tiles.png
|
||||
$(gfx) $< $@ -num_tiles 509
|
||||
$(GFX) $< $@ -num_tiles 509
|
||||
|
||||
fontdir := data/graphics/fonts
|
||||
|
||||
$(fontdir)/font0.latfont: $(fontdir)/font0_latin.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font1.latfont: $(fontdir)/font1_latin.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font2.latfont: $(fontdir)/font2_latin.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font7.latfont: $(fontdir)/font7_latin.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font8.latfont: $(fontdir)/font8_latin.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font0.hwjpnfont: $(fontdir)/font0_japanese.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font1.hwjpnfont: $(fontdir)/font1_japanese.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font9.hwjpnfont: $(fontdir)/font9_japanese.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font2.fwjpnfont: $(fontdir)/font2_japanese.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/font6.fwjpnfont: $(fontdir)/font6_braille.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/unused_frlg_male.fwjpnfont: $(fontdir)/unused_japanese_frlg_male_font.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
$(fontdir)/unused_frlg_female.fwjpnfont: $(fontdir)/unused_japanese_frlg_female_font.png
|
||||
$(gfx) $< $@
|
||||
$(GFX) $< $@
|
||||
|
||||
data/graphics/title_screen/pokemon_logo.gbapal: data/graphics/title_screen/pokemon_logo.pal
|
||||
$(gfx) $< $@ -num_colors 224
|
||||
$(GFX) $< $@ -num_colors 224
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
#ifndef GUARD_GLOBAL_H
|
||||
#define GUARD_GLOBAL_H
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef unsigned short u16;
|
||||
typedef unsigned int u32;
|
||||
|
|
@ -30,3 +33,5 @@ typedef u32 bool32;
|
|||
#define CPU_SET_32BIT (1 << 26)
|
||||
|
||||
extern void CpuSet(void *src, void *dest, u32 controlData);
|
||||
|
||||
#endif // GUARD_GLOBAL_H
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
#ifndef GUARD_IO_REGS_H
|
||||
#define GUARD_IO_REGS_H
|
||||
|
||||
#define REG_BASE 0x4000000 // I/O register base address
|
||||
|
||||
// I/O register offsets
|
||||
|
|
@ -335,3 +338,51 @@
|
|||
#define REG_ADDR_IF (REG_BASE + REG_OFFSET_IF)
|
||||
|
||||
#define REG_ADDR_WAITCNT (REG_BASE + REG_OFFSET_WAITCNT)
|
||||
|
||||
// I/O registers
|
||||
|
||||
#define REG_DISPCNT (*(vu32 *)REG_ADDR_DISPCNT)
|
||||
#define REG_DISPSTAT (*(vu16 *)REG_ADDR_DISPSTAT)
|
||||
#define REG_VCOUNT (*(vu16 *)REG_ADDR_VCOUNT)
|
||||
|
||||
#define REG_IME (*(vu16 *)REG_ADDR_IME)
|
||||
#define REG_IE (*(vu16 *)REG_ADDR_IE)
|
||||
#define REG_IF (*(vu16 *)REG_ADDR_IF)
|
||||
|
||||
// I/O register fields
|
||||
|
||||
// DISPCNT
|
||||
#define DISPCNT_MODE_0 0x0000
|
||||
#define DISPCNT_MODE_1 0x0001
|
||||
#define DISPCNT_MODE_2 0x0002
|
||||
#define DISPCNT_MODE_3 0x0003
|
||||
#define DISPCNT_MODE_4 0x0004
|
||||
#define DISPCNT_MODE_5 0x0005
|
||||
#define DISPCNT_OBJ_1D_MAP 0x0040
|
||||
#define DISPCNT_FORCED_BLANK 0x0080
|
||||
|
||||
// DISPSTAT
|
||||
#define DISPSTAT_VBLANK 0x0001 // in V-Blank
|
||||
#define DISPSTAT_HBLANK 0x0002 // in H-Blank
|
||||
#define DISPSTAT_VCOUNT 0x0004 // V-Count match
|
||||
#define DISPSTAT_VBLANK_INTR 0x0008 // V-Blank interrupt enabled
|
||||
#define DISPSTAT_HBLANK_INTR 0x0010 // H-Blank interrupt enabled
|
||||
#define DISPSTAT_VCOUNT_INTR 0x0020 // V-Count interrupt enabled
|
||||
|
||||
// interrupt flags
|
||||
#define INTR_FLAG_VBLANK (1 << 0)
|
||||
#define INTR_FLAG_HBLANK (1 << 1)
|
||||
#define INTR_FLAG_VCOUNT (1 << 2)
|
||||
#define INTR_FLAG_TIMER0 (1 << 3)
|
||||
#define INTR_FLAG_TIMER1 (1 << 4)
|
||||
#define INTR_FLAG_TIMER2 (1 << 5)
|
||||
#define INTR_FLAG_TIMER3 (1 << 6)
|
||||
#define INTR_FLAG_SERIAL (1 << 7)
|
||||
#define INTR_FLAG_DMA0 (1 << 8)
|
||||
#define INTR_FLAG_DMA1 (1 << 9)
|
||||
#define INTR_FLAG_DMA2 (1 << 10)
|
||||
#define INTR_FLAG_DMA3 (1 << 11)
|
||||
#define INTR_FLAG_KEYPAD (1 << 12)
|
||||
#define INTR_FLAG_GAMEPAK (1 << 13)
|
||||
|
||||
#endif // GUARD_IO_REGS_H
|
||||
|
|
|
|||
178
src/gpu_regs.c
Normal file
178
src/gpu_regs.c
Normal file
|
|
@ -0,0 +1,178 @@
|
|||
#include "global.h"
|
||||
|
||||
#define GPU_REG_BUFFER_SIZE 0x60
|
||||
|
||||
#define REG_BUF(offset) (*(u16 *)(&gGpuRegBuffer[offset]))
|
||||
#define GPU_REG(offset) (*(vu16 *)(REG_BASE + offset))
|
||||
|
||||
#define EMPTY_SLOT 0xFF
|
||||
|
||||
extern u8 gGpuRegBuffer[GPU_REG_BUFFER_SIZE];
|
||||
extern u8 gGpuRegWaitingList[GPU_REG_BUFFER_SIZE];
|
||||
extern bool8 gGpuRegBufferLocked;
|
||||
extern bool8 gShouldSyncRegIE;
|
||||
extern u16 gRegIE;
|
||||
|
||||
static void CopyBufferedValueToGpuReg(u8 regOffset);
|
||||
static void SyncRegIE();
|
||||
static void UpdateRegDispstatIntrBits(u16 regIE);
|
||||
|
||||
void InitGpuRegManager()
|
||||
{
|
||||
s32 i;
|
||||
|
||||
for (i = 0; i < GPU_REG_BUFFER_SIZE; i++) {
|
||||
gGpuRegBuffer[i] = 0;
|
||||
gGpuRegWaitingList[i] = EMPTY_SLOT;
|
||||
}
|
||||
|
||||
gGpuRegBufferLocked = FALSE;
|
||||
gShouldSyncRegIE = FALSE;
|
||||
gRegIE = 0;
|
||||
}
|
||||
|
||||
static void CopyBufferedValueToGpuReg(u8 regOffset)
|
||||
{
|
||||
if (regOffset == REG_OFFSET_DISPSTAT) {
|
||||
REG_DISPSTAT &= ~(DISPSTAT_HBLANK_INTR | DISPSTAT_VBLANK_INTR);
|
||||
REG_DISPSTAT |= REG_BUF(REG_OFFSET_DISPSTAT);
|
||||
} else {
|
||||
GPU_REG(regOffset) = REG_BUF(regOffset);
|
||||
}
|
||||
}
|
||||
|
||||
void CopyBufferedValuesToGpuRegs()
|
||||
{
|
||||
if (!gGpuRegBufferLocked) {
|
||||
s32 i;
|
||||
|
||||
for (i = 0; i < GPU_REG_BUFFER_SIZE; i++) {
|
||||
u8 regOffset = gGpuRegWaitingList[i];
|
||||
if (regOffset == EMPTY_SLOT)
|
||||
return;
|
||||
CopyBufferedValueToGpuReg(regOffset);
|
||||
gGpuRegWaitingList[i] = EMPTY_SLOT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void SetGpuReg(u8 regOffset, u16 value)
|
||||
{
|
||||
if (regOffset < GPU_REG_BUFFER_SIZE)
|
||||
{
|
||||
u16 vcount;
|
||||
|
||||
REG_BUF(regOffset) = value;
|
||||
vcount = REG_VCOUNT;
|
||||
|
||||
if ((vcount >= 161 && vcount <= 225)
|
||||
|| (REG_DISPCNT & DISPCNT_FORCED_BLANK)) {
|
||||
CopyBufferedValueToGpuReg(regOffset);
|
||||
} else {
|
||||
s32 i;
|
||||
|
||||
gGpuRegBufferLocked = TRUE;
|
||||
|
||||
for (i = 0; i < GPU_REG_BUFFER_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
|
||||
if (gGpuRegWaitingList[i] == regOffset) {
|
||||
gGpuRegBufferLocked = FALSE;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
gGpuRegWaitingList[i] = regOffset;
|
||||
gGpuRegBufferLocked = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void SetGpuReg_ForcedBlank(u8 regOffset, u16 value)
|
||||
{
|
||||
if (regOffset < GPU_REG_BUFFER_SIZE)
|
||||
{
|
||||
REG_BUF(regOffset) = value;
|
||||
|
||||
if (REG_DISPCNT & DISPCNT_FORCED_BLANK) {
|
||||
CopyBufferedValueToGpuReg(regOffset);
|
||||
} else {
|
||||
s32 i;
|
||||
|
||||
gGpuRegBufferLocked = TRUE;
|
||||
|
||||
for (i = 0; i < GPU_REG_BUFFER_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
|
||||
if (gGpuRegWaitingList[i] == regOffset) {
|
||||
gGpuRegBufferLocked = FALSE;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
gGpuRegWaitingList[i] = regOffset;
|
||||
gGpuRegBufferLocked = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
u16 GetGpuReg(u8 regOffset)
|
||||
{
|
||||
if (regOffset == REG_OFFSET_DISPSTAT)
|
||||
return REG_DISPSTAT;
|
||||
|
||||
if (regOffset == REG_OFFSET_VCOUNT)
|
||||
return REG_VCOUNT;
|
||||
|
||||
return REG_BUF(regOffset);
|
||||
}
|
||||
|
||||
void SetGpuRegBits(u8 regOffset, u16 mask)
|
||||
{
|
||||
u16 regValue = REG_BUF(regOffset);
|
||||
SetGpuReg(regOffset, regValue | mask);
|
||||
}
|
||||
|
||||
void ClearGpuRegBits(u8 regOffset, u16 mask)
|
||||
{
|
||||
u16 regValue = REG_BUF(regOffset);
|
||||
SetGpuReg(regOffset, regValue & ~mask);
|
||||
}
|
||||
|
||||
static void SyncRegIE()
|
||||
{
|
||||
if (gShouldSyncRegIE) {
|
||||
u16 temp = REG_IME;
|
||||
REG_IME = 0;
|
||||
REG_IE = gRegIE;
|
||||
REG_IME = temp;
|
||||
gShouldSyncRegIE = FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
void EnableInterrupts(u16 mask)
|
||||
{
|
||||
gRegIE |= mask;
|
||||
gShouldSyncRegIE = TRUE;
|
||||
SyncRegIE();
|
||||
UpdateRegDispstatIntrBits(gRegIE);
|
||||
}
|
||||
|
||||
void DisableInterrupts(u16 mask)
|
||||
{
|
||||
gRegIE &= ~mask;
|
||||
gShouldSyncRegIE = TRUE;
|
||||
SyncRegIE();
|
||||
UpdateRegDispstatIntrBits(gRegIE);
|
||||
}
|
||||
|
||||
static void UpdateRegDispstatIntrBits(u16 regIE)
|
||||
{
|
||||
u16 oldValue = GetGpuReg(REG_OFFSET_DISPSTAT) & (DISPSTAT_HBLANK_INTR | DISPSTAT_VBLANK_INTR);
|
||||
u16 newValue = 0;
|
||||
|
||||
if (regIE & INTR_FLAG_VBLANK)
|
||||
newValue |= DISPSTAT_VBLANK_INTR;
|
||||
|
||||
if (regIE & INTR_FLAG_HBLANK)
|
||||
newValue |= DISPSTAT_HBLANK_INTR;
|
||||
|
||||
if (oldValue != newValue)
|
||||
SetGpuReg(REG_OFFSET_DISPSTAT, newValue);
|
||||
}
|
||||
|
|
@ -276,6 +276,17 @@ void AsmFile::SkipString()
|
|||
}
|
||||
}
|
||||
|
||||
bool CanOpenFile(std::string path)
|
||||
{
|
||||
FILE *fp = fopen(path.c_str(), "rb");
|
||||
|
||||
if (fp == NULL)
|
||||
return false;
|
||||
|
||||
fclose(fp);
|
||||
return true;
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
if (argc < 2)
|
||||
|
|
@ -296,7 +307,9 @@ int main(int argc, char **argv)
|
|||
|
||||
while ((incDirectiveType = file.ReadUntilIncDirective(path)) != IncDirectiveType::None) {
|
||||
bool inserted = dependencies.insert(path).second;
|
||||
if (inserted && incDirectiveType == IncDirectiveType::Include)
|
||||
if (inserted
|
||||
&& incDirectiveType == IncDirectiveType::Include
|
||||
&& CanOpenFile(path))
|
||||
filesToProcess.push(path);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -6,4 +6,7 @@ gDma3ManagerLocked = 0x03000810;
|
|||
gDma3RequestCursor = 0x03000811;
|
||||
|
||||
gGpuRegBuffer = 0x03000818;
|
||||
gGpuRegWaitingList = 0x03000878;
|
||||
gGpuRegBufferLocked = 0x030008D8;
|
||||
gShouldSyncRegIE = 0x030008D9;
|
||||
gRegIE = 0x030008DA;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user