gpu_regs.c

This commit is contained in:
YamaArashi 2016-01-08 01:08:16 -08:00
parent 4e95a13295
commit b4781cdf03
11 changed files with 366 additions and 497 deletions

1
.gitattributes vendored
View File

@ -6,6 +6,7 @@ Makefile text eol=lf
*.mk text eol=lf
*.c text eol=lf
*.h text eol=lf
*.pl text eol=lf
*.png binary
*.bin binary

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@ -23,6 +23,10 @@ SCANINC := tools/scaninc/scaninc
CSRCS := $(wildcard src/*.c)
OBJS := asm/emerald.o
$(foreach obj, $(OBJS), \
$(eval $(obj)_deps := $(shell $(SCANINC) $(obj:.o=.s))) \
)
ROM := pokeemerald.gba
ELF := $(ROM:.gba=.elf)
@ -55,12 +59,7 @@ include graphics_file_rules.mk
%.gbapal: %.pal ; $(GFX) $< $@
%.lz: % ; $(GFX) $< $@
deps: $(CSRCS:src/%.c=genasm/%.s)
$(foreach obj, $(OBJS), \
$(eval $(obj)_deps := $(shell $(SCANINC) $(obj:.o=.s))) \
)
$(OBJS): deps
$(OBJS): $(CSRCS:src/%.c=genasm/%.s)
# TODO: fix this .syntax hack
@ -73,8 +72,9 @@ genasm/suffix.tmp:
genasm/%.s: src/%.c genasm/prefix.tmp genasm/suffix.tmp
mkdir -p genasm
$(CC) $(CFLAGS) -o $@.tmp $< -S
cat genasm/prefix.tmp $@.tmp genasm/suffix.tmp >$@
$(RM) $@.tmp
cat genasm/prefix.tmp $@.tmp genasm/suffix.tmp >$@.tmp2
perl fix_local_labels.pl $@.tmp2 $@
$(RM) $@.tmp $@.tmp2
%.o: %.s $$($$@_deps)
$(AS) $(ASFLAGS) -o $@ $<

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@ -15,7 +15,7 @@ Start:
.include "asm/main.s"
.include "genasm/malloc.s"
.include "asm/dma3_manager.s"
.include "asm/gpu_reg_manager.s"
.include "genasm/gpu_regs.s"
.include "asm/gpu_bg.s"
.include "asm/pixel_buffer.s"
.include "asm/window.s"

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@ -1,410 +0,0 @@
thumb_func_start InitGpuRegManager
; void InitGpuRegManager()
InitGpuRegManager: ; 8000FE4
push {r4-r7,lr}
mov r7, r8
push {r7}
movs r2, 0
ldr r7, =0x030008d8
ldr r0, =0x030008d9
mov r12, r0
ldr r1, =0x030008da
mov r8, r1
ldr r6, =0x03000818
movs r5, 0
ldr r4, =0x03000878
movs r3, 0xFF
_08000FFE:
adds r0, r2, r6
strb r5, [r0]
adds r1, r2, r4
ldrb r0, [r1]
orrs r0, r3
strb r0, [r1]
adds r2, 0x1
cmp r2, 0x5F
ble _08000FFE
movs r0, 0
strb r0, [r7]
mov r1, r12
strb r0, [r1]
movs r0, 0
mov r1, r8
strh r0, [r1]
pop {r3}
mov r8, r3
pop {r4-r7}
pop {r0}
bx r0
.pool
thumb_func_end InitGpuRegManager
thumb_func_start CopyBufferedValueToGpuReg
; void CopyBufferedValueToGpuReg(u8 reg)
CopyBufferedValueToGpuReg: ; 800103C
push {lr}
lsls r0, 24
lsrs r2, r0, 24
cmp r2, 0x4
bne _08001068
ldr r2, =0x04000004
ldrh r1, [r2]
ldr r0, =0x0000ffe7
ands r0, r1
strh r0, [r2]
ldr r1, =0x0300081c
ldrh r0, [r2]
ldrh r1, [r1]
orrs r0, r1
strh r0, [r2]
b _08001076
.pool
_08001068:
movs r0, 0x80
lsls r0, 19
adds r0, r2, r0
ldr r1, =0x03000818
adds r1, r2, r1
ldrh r1, [r1]
strh r1, [r0]
_08001076:
pop {r0}
bx r0
.pool
thumb_func_end CopyBufferedValueToGpuReg
thumb_func_start CopyBufferedValuesToGpuRegs
; void CopyBufferedValuesToGpuRegs()
CopyBufferedValuesToGpuRegs: ; 8001080
push {r4,r5,lr}
ldr r0, =0x030008d8
ldrb r0, [r0]
cmp r0, 0
bne _080010A4
movs r5, 0
_0800108C:
ldr r0, =0x03000878
adds r4, r5, r0
ldrb r0, [r4]
cmp r0, 0xFF
beq _080010A4
bl CopyBufferedValueToGpuReg
movs r0, 0xFF
strb r0, [r4]
adds r5, 0x1
cmp r5, 0x5F
ble _0800108C
_080010A4:
pop {r4,r5}
pop {r0}
bx r0
.pool
thumb_func_end CopyBufferedValuesToGpuRegs
thumb_func_start SetGpuReg
; void SetGpuReg(u8 reg, u16 value)
SetGpuReg: ; 80010B4
push {r4,r5,lr}
lsls r0, 24
lsrs r4, r0, 24
lsls r1, 16
lsrs r1, 16
cmp r4, 0x5F
bhi _08001130
ldr r0, =0x03000818
adds r0, r4, r0
strh r1, [r0]
ldr r0, =0x04000006
ldrh r1, [r0]
movs r0, 0xFF
ands r0, r1
subs r0, 0xA1
lsls r0, 16
lsrs r0, 16
cmp r0, 0x40
bls _080010E8
movs r0, 0x80
lsls r0, 19
ldrh r1, [r0]
movs r0, 0x80
ands r0, r1
cmp r0, 0
beq _080010FE
_080010E8:
adds r0, r4, 0
bl CopyBufferedValueToGpuReg
b _08001130
.pool
_080010F8:
movs r0, 0
strb r0, [r5]
b _08001130
_080010FE:
ldr r2, =0x030008d8
movs r0, 0x1
strb r0, [r2]
movs r3, 0
ldr r0, =0x03000878
ldrb r1, [r0]
adds r5, r2, 0
adds r2, r0, 0
cmp r1, 0xFF
beq _08001128
adds r1, r2, 0
_08001114:
ldrb r0, [r1]
cmp r0, r4
beq _080010F8
adds r1, 0x1
adds r3, 0x1
cmp r3, 0x5F
bgt _08001128
ldrb r0, [r1]
cmp r0, 0xFF
bne _08001114
_08001128:
adds r0, r3, r2
movs r1, 0
strb r4, [r0]
strb r1, [r5]
_08001130:
pop {r4,r5}
pop {r0}
bx r0
.pool
thumb_func_end SetGpuReg
thumb_func_start SetGpuReg_ForcedBlank
; void SetGpuReg_ForcedBlank(u8 reg, u16 value)
SetGpuReg_ForcedBlank: ; 8001140
push {r4,r5,lr}
lsls r0, 24
lsrs r4, r0, 24
lsls r1, 16
lsrs r1, 16
cmp r4, 0x5F
bhi _080011A8
ldr r0, =0x03000818
adds r0, r4, r0
strh r1, [r0]
movs r0, 0x80
lsls r0, 19
ldrh r1, [r0]
movs r0, 0x80
ands r0, r1
cmp r0, 0
beq _08001176
adds r0, r4, 0
bl CopyBufferedValueToGpuReg
b _080011A8
.pool
_08001170:
movs r0, 0
strb r0, [r5]
b _080011A8
_08001176:
ldr r2, =0x030008d8
movs r0, 0x1
strb r0, [r2]
movs r3, 0
ldr r0, =0x03000878
ldrb r1, [r0]
adds r5, r2, 0
adds r2, r0, 0
cmp r1, 0xFF
beq _080011A0
adds r1, r2, 0
_0800118C:
ldrb r0, [r1]
cmp r0, r4
beq _08001170
adds r1, 0x1
adds r3, 0x1
cmp r3, 0x5F
bgt _080011A0
ldrb r0, [r1]
cmp r0, 0xFF
bne _0800118C
_080011A0:
adds r0, r3, r2
movs r1, 0
strb r4, [r0]
strb r1, [r5]
_080011A8:
pop {r4,r5}
pop {r0}
bx r0
.pool
thumb_func_end SetGpuReg_ForcedBlank
thumb_func_start GetGpuReg
; u16 GetGpuReg(u8 reg)
GetGpuReg: ; 80011B8
push {lr}
lsls r0, 24
lsrs r0, 24
adds r1, r0, 0
cmp r1, 0x4
bne _080011CC
ldr r0, =0x04000004
b _080011DE
.pool
_080011CC:
cmp r1, 0x6
beq _080011DC
ldr r0, =0x03000818
adds r0, r1, r0
ldrh r0, [r0]
b _080011E0
.pool
_080011DC:
ldr r0, =0x04000006
_080011DE:
ldrh r0, [r0]
_080011E0:
pop {r1}
bx r1
.pool
thumb_func_end GetGpuReg
thumb_func_start SetGpuRegBits
; void SetGpuRegBits(u8 reg, u16 mask)
SetGpuRegBits: ; 80011E8
push {lr}
adds r2, r1, 0
lsls r0, 24
lsrs r0, 24
ldr r1, =0x03000818
adds r1, r0, r1
ldrh r1, [r1]
orrs r1, r2
lsls r1, 16
lsrs r1, 16
bl SetGpuReg
pop {r0}
bx r0
.pool
thumb_func_end SetGpuRegBits
thumb_func_start ClearGpuRegBits
; void ClearGpuRegBits(u8 reg, u16 mask)
ClearGpuRegBits: ; 8001208
push {lr}
adds r2, r1, 0
lsls r0, 24
lsrs r0, 24
lsls r2, 16
ldr r1, =0x03000818
adds r1, r0, r1
ldrh r1, [r1]
lsrs r2, 16
bics r1, r2
bl SetGpuReg
pop {r0}
bx r0
.pool
thumb_func_end ClearGpuRegBits
thumb_func_start SyncRegIE
; void SyncRegIE()
SyncRegIE: ; 8001228
push {r4,r5,lr}
ldr r5, =0x030008d9
ldrb r0, [r5]
cmp r0, 0
beq _08001246
ldr r2, =0x04000208
ldrh r1, [r2]
movs r4, 0
strh r4, [r2]
ldr r3, =0x04000200
ldr r0, =0x030008da
ldrh r0, [r0]
strh r0, [r3]
strh r1, [r2]
strb r4, [r5]
_08001246:
pop {r4,r5}
pop {r0}
bx r0
.pool
thumb_func_end SyncRegIE
thumb_func_start EnableInterrupts
; void EnableInterrupts(u16 mask)
EnableInterrupts: ; 800125C
push {r4,lr}
lsls r0, 16
lsrs r0, 16
ldr r4, =0x030008da
ldrh r1, [r4]
orrs r0, r1
strh r0, [r4]
ldr r1, =0x030008d9
movs r0, 0x1
strb r0, [r1]
bl SyncRegIE
ldrh r0, [r4]
bl UpdateRegDispstatIntrBits
pop {r4}
pop {r0}
bx r0
.pool
thumb_func_end EnableInterrupts
thumb_func_start DisableInterrupts
; void DisableInterrupts(u16 mask)
DisableInterrupts: ; 8001288
push {r4,lr}
lsls r0, 16
lsrs r0, 16
ldr r4, =0x030008da
ldrh r1, [r4]
bics r1, r0
strh r1, [r4]
ldr r1, =0x030008d9
movs r0, 0x1
strb r0, [r1]
bl SyncRegIE
ldrh r0, [r4]
bl UpdateRegDispstatIntrBits
pop {r4}
pop {r0}
bx r0
.pool
thumb_func_end DisableInterrupts
thumb_func_start UpdateRegDispstatIntrBits
; void UpdateRegDispstatIntrBits(u16 mask)
UpdateRegDispstatIntrBits: ; 80012B4
push {r4,lr}
adds r4, r0, 0
lsls r4, 16
lsrs r4, 16
movs r0, 0x4
bl GetGpuReg
movs r2, 0x18
ands r2, r0
movs r1, 0x1
ands r1, r4
negs r0, r1
orrs r0, r1
asrs r1, r0, 31
movs r0, 0x8
ands r1, r0
movs r0, 0x2
ands r0, r4
cmp r0, 0
beq _080012E0
movs r0, 0x10
orrs r1, r0
_080012E0:
cmp r2, r1
beq _080012EA
movs r0, 0x4
bl SetGpuReg
_080012EA:
pop {r4}
pop {r0}
bx r0
thumb_func_end UpdateRegDispstatIntrBits

28
fix_local_labels.pl Normal file
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@ -0,0 +1,28 @@
use strict;
use warnings;
open(IN_FILE, $ARGV[0]);
open(OUT_FILE, ">", $ARGV[1]);
my @labels = ();
while (<IN_FILE>) {
if ($_ =~ /^\.(.+):/) {
push(@labels, $1);
}
}
seek IN_FILE, 0, 0;
while (<IN_FILE>) {
for (my $i = 0; $i < scalar(@labels); $i++) {
my $find = quotemeta '.' . $labels[$i];
my $replace = '$' . $labels[$i];
$_ =~ s/$find/$replace/;
}
print OUT_FILE $_;
}
close(IN_FILE);
close(OUT_FILE);

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@ -36,234 +36,234 @@ $(monpaldir)/castform_shiny_palette.gbapal: $(monpaldir)/castform_normal_form_sh
tilesetdir := data/graphics/tilesets
$(tilesetdir)/secondary/petalburg/tiles.4bpp: $(tilesetdir)/secondary/petalburg/tiles.png
$(gfx) $< $@ -num_tiles 159
$(GFX) $< $@ -num_tiles 159
$(tilesetdir)/secondary/rustboro/tiles.4bpp: $(tilesetdir)/secondary/rustboro/tiles.png
$(gfx) $< $@ -num_tiles 498
$(GFX) $< $@ -num_tiles 498
$(tilesetdir)/secondary/dewford/tiles.4bpp: $(tilesetdir)/secondary/dewford/tiles.png
$(gfx) $< $@ -num_tiles 503
$(GFX) $< $@ -num_tiles 503
$(tilesetdir)/secondary/slateport/tiles.4bpp: $(tilesetdir)/secondary/slateport/tiles.png
$(gfx) $< $@ -num_tiles 504
$(GFX) $< $@ -num_tiles 504
$(tilesetdir)/secondary/mauville/tiles.4bpp: $(tilesetdir)/secondary/mauville/tiles.png
$(gfx) $< $@ -num_tiles 503
$(GFX) $< $@ -num_tiles 503
$(tilesetdir)/secondary/lavaridge/tiles.4bpp: $(tilesetdir)/secondary/lavaridge/tiles.png
$(gfx) $< $@ -num_tiles 450
$(GFX) $< $@ -num_tiles 450
$(tilesetdir)/secondary/fortree/tiles.4bpp: $(tilesetdir)/secondary/fortree/tiles.png
$(gfx) $< $@ -num_tiles 493
$(GFX) $< $@ -num_tiles 493
$(tilesetdir)/secondary/pacifidlog/tiles.4bpp: $(tilesetdir)/secondary/pacifidlog/tiles.png
$(gfx) $< $@ -num_tiles 504
$(GFX) $< $@ -num_tiles 504
$(tilesetdir)/secondary/sootopolis/tiles.4bpp: $(tilesetdir)/secondary/sootopolis/tiles.png
$(gfx) $< $@ -num_tiles 328
$(GFX) $< $@ -num_tiles 328
$(tilesetdir)/secondary/battle_frontier_outside_west/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier_outside_west/tiles.png
$(gfx) $< $@ -num_tiles 508
$(GFX) $< $@ -num_tiles 508
$(tilesetdir)/secondary/battle_frontier_outside_east/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier_outside_east/tiles.png
$(gfx) $< $@ -num_tiles 508
$(GFX) $< $@ -num_tiles 508
$(tilesetdir)/primary/inside_building/tiles.4bpp: $(tilesetdir)/primary/inside_building/tiles.png
$(gfx) $< $@ -num_tiles 502
$(GFX) $< $@ -num_tiles 502
$(tilesetdir)/secondary/shop/tiles.4bpp: $(tilesetdir)/secondary/shop/tiles.png
$(gfx) $< $@ -num_tiles 502
$(GFX) $< $@ -num_tiles 502
$(tilesetdir)/secondary/pokemon_center/tiles.4bpp: $(tilesetdir)/secondary/pokemon_center/tiles.png
$(gfx) $< $@ -num_tiles 478
$(GFX) $< $@ -num_tiles 478
$(tilesetdir)/secondary/cave/tiles.4bpp: $(tilesetdir)/secondary/cave/tiles.png
$(gfx) $< $@ -num_tiles 425
$(GFX) $< $@ -num_tiles 425
$(tilesetdir)/secondary/pokemon_school/tiles.4bpp: $(tilesetdir)/secondary/pokemon_school/tiles.png
$(gfx) $< $@ -num_tiles 278
$(GFX) $< $@ -num_tiles 278
$(tilesetdir)/secondary/pokemon_fan_club/tiles.4bpp: $(tilesetdir)/secondary/pokemon_fan_club/tiles.png
$(gfx) $< $@ -num_tiles 319
$(GFX) $< $@ -num_tiles 319
$(tilesetdir)/secondary/unused_1/tiles.4bpp: $(tilesetdir)/secondary/unused_1/tiles.png
$(gfx) $< $@ -num_tiles 17
$(GFX) $< $@ -num_tiles 17
$(tilesetdir)/secondary/meteor_falls/tiles.4bpp: $(tilesetdir)/secondary/meteor_falls/tiles.png
$(gfx) $< $@ -num_tiles 460
$(GFX) $< $@ -num_tiles 460
$(tilesetdir)/secondary/oceanic_museum/tiles.4bpp: $(tilesetdir)/secondary/oceanic_museum/tiles.png
$(gfx) $< $@ -num_tiles 319
$(GFX) $< $@ -num_tiles 319
$(tilesetdir)/secondary/cable_club/unknown_tiles.4bpp: $(tilesetdir)/secondary/cable_club/unknown_tiles.png
$(gfx) $< $@ -num_tiles 120
$(GFX) $< $@ -num_tiles 120
$(tilesetdir)/secondary/seashore_house/tiles.4bpp: $(tilesetdir)/secondary/seashore_house/tiles.png
$(gfx) $< $@ -num_tiles 312
$(GFX) $< $@ -num_tiles 312
$(tilesetdir)/secondary/pretty_petal_flower_shop/tiles.4bpp: $(tilesetdir)/secondary/pretty_petal_flower_shop/tiles.png
$(gfx) $< $@ -num_tiles 345
$(GFX) $< $@ -num_tiles 345
$(tilesetdir)/secondary/pokemon_day_care/tiles.4bpp: $(tilesetdir)/secondary/pokemon_day_care/tiles.png
$(gfx) $< $@ -num_tiles 355
$(GFX) $< $@ -num_tiles 355
$(tilesetdir)/secondary/secret_base/brown_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/brown_cave/tiles.png
$(gfx) $< $@ -num_tiles 82
$(GFX) $< $@ -num_tiles 82
$(tilesetdir)/secondary/secret_base/tree/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/tree/tiles.png
$(gfx) $< $@ -num_tiles 82
$(GFX) $< $@ -num_tiles 82
$(tilesetdir)/secondary/secret_base/shrub/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/shrub/tiles.png
$(gfx) $< $@ -num_tiles 82
$(GFX) $< $@ -num_tiles 82
$(tilesetdir)/secondary/secret_base/blue_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/blue_cave/tiles.png
$(gfx) $< $@ -num_tiles 82
$(GFX) $< $@ -num_tiles 82
$(tilesetdir)/secondary/secret_base/yellow_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/yellow_cave/tiles.png
$(gfx) $< $@ -num_tiles 82
$(GFX) $< $@ -num_tiles 82
$(tilesetdir)/secondary/secret_base/red_cave/unused_tiles.4bpp: $(tilesetdir)/secondary/secret_base/red_cave/tiles.png
$(gfx) $< $@ -num_tiles 82
$(GFX) $< $@ -num_tiles 82
$(tilesetdir)/secondary/secret_base/brown_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/brown_cave/tiles.png
$(gfx) $< $@ -num_tiles 83
$(GFX) $< $@ -num_tiles 83
$(tilesetdir)/secondary/secret_base/tree/tiles.4bpp: $(tilesetdir)/secondary/secret_base/tree/tiles.png
$(gfx) $< $@ -num_tiles 83
$(GFX) $< $@ -num_tiles 83
$(tilesetdir)/secondary/secret_base/shrub/tiles.4bpp: $(tilesetdir)/secondary/secret_base/shrub/tiles.png
$(gfx) $< $@ -num_tiles 83
$(GFX) $< $@ -num_tiles 83
$(tilesetdir)/secondary/secret_base/blue_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/blue_cave/tiles.png
$(gfx) $< $@ -num_tiles 83
$(GFX) $< $@ -num_tiles 83
$(tilesetdir)/secondary/secret_base/yellow_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/yellow_cave/tiles.png
$(gfx) $< $@ -num_tiles 83
$(GFX) $< $@ -num_tiles 83
$(tilesetdir)/secondary/secret_base/red_cave/tiles.4bpp: $(tilesetdir)/secondary/secret_base/red_cave/tiles.png
$(gfx) $< $@ -num_tiles 83
$(GFX) $< $@ -num_tiles 83
$(tilesetdir)/secondary/inside_of_truck/tiles.4bpp: $(tilesetdir)/secondary/inside_of_truck/tiles.png
$(gfx) $< $@ -num_tiles 62
$(GFX) $< $@ -num_tiles 62
$(tilesetdir)/secondary/contest/tiles.4bpp: $(tilesetdir)/secondary/contest/tiles.png
$(gfx) $< $@ -num_tiles 430
$(GFX) $< $@ -num_tiles 430
$(tilesetdir)/secondary/lilycove_museum/tiles.4bpp: $(tilesetdir)/secondary/lilycove_museum/tiles.png
$(gfx) $< $@ -num_tiles 431
$(GFX) $< $@ -num_tiles 431
$(tilesetdir)/secondary/lab/tiles.4bpp: $(tilesetdir)/secondary/lab/tiles.png
$(gfx) $< $@ -num_tiles 500
$(GFX) $< $@ -num_tiles 500
$(tilesetdir)/secondary/underwater/tiles.4bpp: $(tilesetdir)/secondary/underwater/tiles.png
$(gfx) $< $@ -num_tiles 500
$(GFX) $< $@ -num_tiles 500
$(tilesetdir)/secondary/generic_building/tiles.4bpp: $(tilesetdir)/secondary/generic_building/tiles.png
$(gfx) $< $@ -num_tiles 509
$(GFX) $< $@ -num_tiles 509
$(tilesetdir)/secondary/mauville_game_corner/tiles.4bpp: $(tilesetdir)/secondary/mauville_game_corner/tiles.png
$(gfx) $< $@ -num_tiles 469
$(GFX) $< $@ -num_tiles 469
$(tilesetdir)/secondary/unused_2/tiles.4bpp: $(tilesetdir)/secondary/unused_2/tiles.png
$(gfx) $< $@ -num_tiles 150
$(GFX) $< $@ -num_tiles 150
$(tilesetdir)/secondary/rustboro_gym/tiles.4bpp: $(tilesetdir)/secondary/rustboro_gym/tiles.png
$(gfx) $< $@ -num_tiles 60
$(GFX) $< $@ -num_tiles 60
$(tilesetdir)/secondary/dewford_gym/tiles.4bpp: $(tilesetdir)/secondary/dewford_gym/tiles.png
$(gfx) $< $@ -num_tiles 61
$(GFX) $< $@ -num_tiles 61
$(tilesetdir)/secondary/lavaridge_gym/tiles.4bpp: $(tilesetdir)/secondary/lavaridge_gym/tiles.png
$(gfx) $< $@ -num_tiles 54
$(GFX) $< $@ -num_tiles 54
$(tilesetdir)/secondary/petalburg_gym/tiles.4bpp: $(tilesetdir)/secondary/petalburg_gym/tiles.png
$(gfx) $< $@ -num_tiles 148
$(GFX) $< $@ -num_tiles 148
$(tilesetdir)/secondary/fortree_gym/tiles.4bpp: $(tilesetdir)/secondary/fortree_gym/tiles.png
$(gfx) $< $@ -num_tiles 61
$(GFX) $< $@ -num_tiles 61
$(tilesetdir)/secondary/mossdeep_gym/tiles.4bpp: $(tilesetdir)/secondary/mossdeep_gym/tiles.png
$(gfx) $< $@ -num_tiles 82
$(GFX) $< $@ -num_tiles 82
$(tilesetdir)/secondary/sootopolis_gym/tiles.4bpp: $(tilesetdir)/secondary/sootopolis_gym/tiles.png
$(gfx) $< $@ -num_tiles 484
$(GFX) $< $@ -num_tiles 484
$(tilesetdir)/secondary/trick_house_puzzle/tiles.4bpp: $(tilesetdir)/secondary/trick_house_puzzle/tiles.png
$(gfx) $< $@ -num_tiles 294
$(GFX) $< $@ -num_tiles 294
$(tilesetdir)/secondary/inside_ship/tiles.4bpp: $(tilesetdir)/secondary/inside_ship/tiles.png
$(gfx) $< $@ -num_tiles 342
$(GFX) $< $@ -num_tiles 342
$(tilesetdir)/secondary/elite_four/tiles.4bpp: $(tilesetdir)/secondary/elite_four/tiles.png
$(gfx) $< $@ -num_tiles 505
$(GFX) $< $@ -num_tiles 505
$(tilesetdir)/secondary/battle_frontier/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier/tiles.png
$(gfx) $< $@ -num_tiles 310
$(GFX) $< $@ -num_tiles 310
$(tilesetdir)/secondary/battle_factory/tiles.4bpp: $(tilesetdir)/secondary/battle_factory/tiles.png
$(gfx) $< $@ -num_tiles 424
$(GFX) $< $@ -num_tiles 424
$(tilesetdir)/secondary/battle_pike/tiles.4bpp: $(tilesetdir)/secondary/battle_pike/tiles.png
$(gfx) $< $@ -num_tiles 382
$(GFX) $< $@ -num_tiles 382
$(tilesetdir)/secondary/mirage_tower/tiles.4bpp: $(tilesetdir)/secondary/mirage_tower/tiles.png
$(gfx) $< $@ -num_tiles 420
$(GFX) $< $@ -num_tiles 420
$(tilesetdir)/secondary/mossdeep_game_corner/tiles.4bpp: $(tilesetdir)/secondary/mossdeep_game_corner/tiles.png
$(gfx) $< $@ -num_tiles 95
$(GFX) $< $@ -num_tiles 95
$(tilesetdir)/secondary/island_harbor/tiles.4bpp: $(tilesetdir)/secondary/island_harbor/tiles.png
$(gfx) $< $@ -num_tiles 503
$(GFX) $< $@ -num_tiles 503
$(tilesetdir)/secondary/trainer_hill/tiles.4bpp: $(tilesetdir)/secondary/trainer_hill/tiles.png
$(gfx) $< $@ -num_tiles 374
$(GFX) $< $@ -num_tiles 374
$(tilesetdir)/secondary/navel_rock/tiles.4bpp: $(tilesetdir)/secondary/navel_rock/tiles.png
$(gfx) $< $@ -num_tiles 420
$(GFX) $< $@ -num_tiles 420
$(tilesetdir)/secondary/battle_frontier_ranking_hall/tiles.4bpp: $(tilesetdir)/secondary/battle_frontier_ranking_hall/tiles.png
$(gfx) $< $@ -num_tiles 136
$(GFX) $< $@ -num_tiles 136
$(tilesetdir)/secondary/mystery_events_house/tiles.4bpp: $(tilesetdir)/secondary/mystery_events_house/tiles.png
$(gfx) $< $@ -num_tiles 509
$(GFX) $< $@ -num_tiles 509
fontdir := data/graphics/fonts
$(fontdir)/font0.latfont: $(fontdir)/font0_latin.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font1.latfont: $(fontdir)/font1_latin.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font2.latfont: $(fontdir)/font2_latin.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font7.latfont: $(fontdir)/font7_latin.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font8.latfont: $(fontdir)/font8_latin.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font0.hwjpnfont: $(fontdir)/font0_japanese.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font1.hwjpnfont: $(fontdir)/font1_japanese.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font9.hwjpnfont: $(fontdir)/font9_japanese.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font2.fwjpnfont: $(fontdir)/font2_japanese.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/font6.fwjpnfont: $(fontdir)/font6_braille.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/unused_frlg_male.fwjpnfont: $(fontdir)/unused_japanese_frlg_male_font.png
$(gfx) $< $@
$(GFX) $< $@
$(fontdir)/unused_frlg_female.fwjpnfont: $(fontdir)/unused_japanese_frlg_female_font.png
$(gfx) $< $@
$(GFX) $< $@
data/graphics/title_screen/pokemon_logo.gbapal: data/graphics/title_screen/pokemon_logo.pal
$(gfx) $< $@ -num_colors 224
$(GFX) $< $@ -num_colors 224

View File

@ -1,3 +1,6 @@
#ifndef GUARD_GLOBAL_H
#define GUARD_GLOBAL_H
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
@ -30,3 +33,5 @@ typedef u32 bool32;
#define CPU_SET_32BIT (1 << 26)
extern void CpuSet(void *src, void *dest, u32 controlData);
#endif // GUARD_GLOBAL_H

View File

@ -1,3 +1,6 @@
#ifndef GUARD_IO_REGS_H
#define GUARD_IO_REGS_H
#define REG_BASE 0x4000000 // I/O register base address
// I/O register offsets
@ -335,3 +338,51 @@
#define REG_ADDR_IF (REG_BASE + REG_OFFSET_IF)
#define REG_ADDR_WAITCNT (REG_BASE + REG_OFFSET_WAITCNT)
// I/O registers
#define REG_DISPCNT (*(vu32 *)REG_ADDR_DISPCNT)
#define REG_DISPSTAT (*(vu16 *)REG_ADDR_DISPSTAT)
#define REG_VCOUNT (*(vu16 *)REG_ADDR_VCOUNT)
#define REG_IME (*(vu16 *)REG_ADDR_IME)
#define REG_IE (*(vu16 *)REG_ADDR_IE)
#define REG_IF (*(vu16 *)REG_ADDR_IF)
// I/O register fields
// DISPCNT
#define DISPCNT_MODE_0 0x0000
#define DISPCNT_MODE_1 0x0001
#define DISPCNT_MODE_2 0x0002
#define DISPCNT_MODE_3 0x0003
#define DISPCNT_MODE_4 0x0004
#define DISPCNT_MODE_5 0x0005
#define DISPCNT_OBJ_1D_MAP 0x0040
#define DISPCNT_FORCED_BLANK 0x0080
// DISPSTAT
#define DISPSTAT_VBLANK 0x0001 // in V-Blank
#define DISPSTAT_HBLANK 0x0002 // in H-Blank
#define DISPSTAT_VCOUNT 0x0004 // V-Count match
#define DISPSTAT_VBLANK_INTR 0x0008 // V-Blank interrupt enabled
#define DISPSTAT_HBLANK_INTR 0x0010 // H-Blank interrupt enabled
#define DISPSTAT_VCOUNT_INTR 0x0020 // V-Count interrupt enabled
// interrupt flags
#define INTR_FLAG_VBLANK (1 << 0)
#define INTR_FLAG_HBLANK (1 << 1)
#define INTR_FLAG_VCOUNT (1 << 2)
#define INTR_FLAG_TIMER0 (1 << 3)
#define INTR_FLAG_TIMER1 (1 << 4)
#define INTR_FLAG_TIMER2 (1 << 5)
#define INTR_FLAG_TIMER3 (1 << 6)
#define INTR_FLAG_SERIAL (1 << 7)
#define INTR_FLAG_DMA0 (1 << 8)
#define INTR_FLAG_DMA1 (1 << 9)
#define INTR_FLAG_DMA2 (1 << 10)
#define INTR_FLAG_DMA3 (1 << 11)
#define INTR_FLAG_KEYPAD (1 << 12)
#define INTR_FLAG_GAMEPAK (1 << 13)
#endif // GUARD_IO_REGS_H

178
src/gpu_regs.c Normal file
View File

@ -0,0 +1,178 @@
#include "global.h"
#define GPU_REG_BUFFER_SIZE 0x60
#define REG_BUF(offset) (*(u16 *)(&gGpuRegBuffer[offset]))
#define GPU_REG(offset) (*(vu16 *)(REG_BASE + offset))
#define EMPTY_SLOT 0xFF
extern u8 gGpuRegBuffer[GPU_REG_BUFFER_SIZE];
extern u8 gGpuRegWaitingList[GPU_REG_BUFFER_SIZE];
extern bool8 gGpuRegBufferLocked;
extern bool8 gShouldSyncRegIE;
extern u16 gRegIE;
static void CopyBufferedValueToGpuReg(u8 regOffset);
static void SyncRegIE();
static void UpdateRegDispstatIntrBits(u16 regIE);
void InitGpuRegManager()
{
s32 i;
for (i = 0; i < GPU_REG_BUFFER_SIZE; i++) {
gGpuRegBuffer[i] = 0;
gGpuRegWaitingList[i] = EMPTY_SLOT;
}
gGpuRegBufferLocked = FALSE;
gShouldSyncRegIE = FALSE;
gRegIE = 0;
}
static void CopyBufferedValueToGpuReg(u8 regOffset)
{
if (regOffset == REG_OFFSET_DISPSTAT) {
REG_DISPSTAT &= ~(DISPSTAT_HBLANK_INTR | DISPSTAT_VBLANK_INTR);
REG_DISPSTAT |= REG_BUF(REG_OFFSET_DISPSTAT);
} else {
GPU_REG(regOffset) = REG_BUF(regOffset);
}
}
void CopyBufferedValuesToGpuRegs()
{
if (!gGpuRegBufferLocked) {
s32 i;
for (i = 0; i < GPU_REG_BUFFER_SIZE; i++) {
u8 regOffset = gGpuRegWaitingList[i];
if (regOffset == EMPTY_SLOT)
return;
CopyBufferedValueToGpuReg(regOffset);
gGpuRegWaitingList[i] = EMPTY_SLOT;
}
}
}
void SetGpuReg(u8 regOffset, u16 value)
{
if (regOffset < GPU_REG_BUFFER_SIZE)
{
u16 vcount;
REG_BUF(regOffset) = value;
vcount = REG_VCOUNT;
if ((vcount >= 161 && vcount <= 225)
|| (REG_DISPCNT & DISPCNT_FORCED_BLANK)) {
CopyBufferedValueToGpuReg(regOffset);
} else {
s32 i;
gGpuRegBufferLocked = TRUE;
for (i = 0; i < GPU_REG_BUFFER_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
if (gGpuRegWaitingList[i] == regOffset) {
gGpuRegBufferLocked = FALSE;
return;
}
}
gGpuRegWaitingList[i] = regOffset;
gGpuRegBufferLocked = FALSE;
}
}
}
void SetGpuReg_ForcedBlank(u8 regOffset, u16 value)
{
if (regOffset < GPU_REG_BUFFER_SIZE)
{
REG_BUF(regOffset) = value;
if (REG_DISPCNT & DISPCNT_FORCED_BLANK) {
CopyBufferedValueToGpuReg(regOffset);
} else {
s32 i;
gGpuRegBufferLocked = TRUE;
for (i = 0; i < GPU_REG_BUFFER_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
if (gGpuRegWaitingList[i] == regOffset) {
gGpuRegBufferLocked = FALSE;
return;
}
}
gGpuRegWaitingList[i] = regOffset;
gGpuRegBufferLocked = FALSE;
}
}
}
u16 GetGpuReg(u8 regOffset)
{
if (regOffset == REG_OFFSET_DISPSTAT)
return REG_DISPSTAT;
if (regOffset == REG_OFFSET_VCOUNT)
return REG_VCOUNT;
return REG_BUF(regOffset);
}
void SetGpuRegBits(u8 regOffset, u16 mask)
{
u16 regValue = REG_BUF(regOffset);
SetGpuReg(regOffset, regValue | mask);
}
void ClearGpuRegBits(u8 regOffset, u16 mask)
{
u16 regValue = REG_BUF(regOffset);
SetGpuReg(regOffset, regValue & ~mask);
}
static void SyncRegIE()
{
if (gShouldSyncRegIE) {
u16 temp = REG_IME;
REG_IME = 0;
REG_IE = gRegIE;
REG_IME = temp;
gShouldSyncRegIE = FALSE;
}
}
void EnableInterrupts(u16 mask)
{
gRegIE |= mask;
gShouldSyncRegIE = TRUE;
SyncRegIE();
UpdateRegDispstatIntrBits(gRegIE);
}
void DisableInterrupts(u16 mask)
{
gRegIE &= ~mask;
gShouldSyncRegIE = TRUE;
SyncRegIE();
UpdateRegDispstatIntrBits(gRegIE);
}
static void UpdateRegDispstatIntrBits(u16 regIE)
{
u16 oldValue = GetGpuReg(REG_OFFSET_DISPSTAT) & (DISPSTAT_HBLANK_INTR | DISPSTAT_VBLANK_INTR);
u16 newValue = 0;
if (regIE & INTR_FLAG_VBLANK)
newValue |= DISPSTAT_VBLANK_INTR;
if (regIE & INTR_FLAG_HBLANK)
newValue |= DISPSTAT_HBLANK_INTR;
if (oldValue != newValue)
SetGpuReg(REG_OFFSET_DISPSTAT, newValue);
}

View File

@ -276,6 +276,17 @@ void AsmFile::SkipString()
}
}
bool CanOpenFile(std::string path)
{
FILE *fp = fopen(path.c_str(), "rb");
if (fp == NULL)
return false;
fclose(fp);
return true;
}
int main(int argc, char **argv)
{
if (argc < 2)
@ -296,7 +307,9 @@ int main(int argc, char **argv)
while ((incDirectiveType = file.ReadUntilIncDirective(path)) != IncDirectiveType::None) {
bool inserted = dependencies.insert(path).second;
if (inserted && incDirectiveType == IncDirectiveType::Include)
if (inserted
&& incDirectiveType == IncDirectiveType::Include
&& CanOpenFile(path))
filesToProcess.push(path);
}
}

View File

@ -6,4 +6,7 @@ gDma3ManagerLocked = 0x03000810;
gDma3RequestCursor = 0x03000811;
gGpuRegBuffer = 0x03000818;
gGpuRegWaitingList = 0x03000878;
gGpuRegBufferLocked = 0x030008D8;
gShouldSyncRegIE = 0x030008D9;
gRegIE = 0x030008DA;