Make it compile

This commit is contained in:
DizzyEggg 2019-03-23 15:46:47 +01:00 committed by huderlem
parent 77c4856e62
commit cbdecf2f8d
2 changed files with 331 additions and 295 deletions

View File

@ -447,302 +447,338 @@ void sub_81D2230(struct UnknownStruct_81D1ED4 *arg0)
arg0->unk354 = 1; arg0->unk354 = 1;
} }
/* TODO
static void sub_81D2278(struct UnknownStruct_81D1ED4 *arg0, u16 arg1[66][2], struct UnknownSubStruct_81D1ED4 *arg2, struct UnknownSubStruct_81D1ED4 *arg3, u8 arg4, u16 arg5[66][2])
{
s32 var_2C = 0;
u16 r8;
s32 r10, r4, r2, r0, r1, var_30;
if (arg2->unk2 < arg3->unk2)
{
r2 = arg2->unk2;
r10 = arg2->unk2;
r0 = arg3->unk2;
r1 = arg2->unk0;
r4 = r1 << 10;
var_30 = arg3->unk0;
}
else
{
r0 = arg2->unk0;
r10 = arg3->unk2;
r1 = arg3->unk0;
r4 = r1 << 10;
var_30 = arg2->unk0;
r2 = arg3->unk2;
}
r8 = r0 - r2;
if (r8 != 0)
var_2C = ((var_30 - r1) << 10) / r8;
r8++;
if (arg5 == NULL)
{
}
}
*/
NAKED NAKED
static void sub_81D2278(struct UnknownStruct_81D1ED4 *arg0, u16 arg1[66][2], struct UnknownSubStruct_81D1ED4 *arg2, struct UnknownSubStruct_81D1ED4 *arg3, u8 arg4, u16 arg5[66][2]) static void sub_81D2278(struct UnknownStruct_81D1ED4 *arg0, u16 arg1[66][2], struct UnknownSubStruct_81D1ED4 *arg2, struct UnknownSubStruct_81D1ED4 *arg3, u8 arg4, u16 arg5[66][2])
{ {
asm(".syntax unified\n\ asm_unified("\n\
push {r4-r7,lr}\n\ push {r4-r7,lr}\n\
mov r7, r10\n\ mov r7, r10\n\
mov r6, r9\n\ mov r6, r9\n\
mov r5, r8\n\ mov r5, r8\n\
push {r5-r7}\n\ push {r5-r7}\n\
sub sp, 0x18\n\ sub sp, 0x18\n\
str r0, [sp]\n\ str r0, [sp]\n\
adds r6, r1, 0\n\ adds r6, r1, 0\n\
adds r5, r2, 0\n\ adds r5, r2, 0\n\
str r3, [sp, 0x4]\n\ str r3, [sp, 0x4]\n\
ldr r0, [sp, 0x38]\n\ ldr r0, [sp, 0x38]\n\
ldr r7, [sp, 0x3C]\n\ ldr r7, [sp, 0x3C]\n\
lsls r0, 24\n\ lsls r0, 24\n\
lsrs r0, 24\n\ lsrs r0, 24\n\
mov r9, r0\n\ mov r9, r0\n\
movs r0, 0\n\ movs r0, 0\n\
str r0, [sp, 0xC]\n\ str r0, [sp, 0xC]\n\
ldrh r0, [r5, 0x2]\n\ ldrh r0, [r5, 0x2]\n\
ldrh r1, [r3, 0x2]\n\ ldrh r1, [r3, 0x2]\n\
cmp r0, r1\n\ cmp r0, r1\n\
bcs _081D22B2\n\ bcs _081D22B2\n\
adds r2, r0, 0\n\ adds r2, r0, 0\n\
mov r10, r2\n\ mov r10, r2\n\
ldrh r0, [r3, 0x2]\n\ ldrh r0, [r3, 0x2]\n\
ldrh r1, [r5]\n\ ldrh r1, [r5]\n\
lsls r4, r1, 10\n\ lsls r4, r1, 10\n\
ldrh r3, [r3]\n\ ldrh r3, [r3]\n\
str r3, [sp, 0x8]\n\ str r3, [sp, 0x8]\n\
b _081D22C6\n\ b _081D22C6\n\
_081D22B2:\n\ _081D22B2:\n\
ldrh r0, [r5, 0x2]\n\ ldrh r0, [r5, 0x2]\n\
ldr r1, [sp, 0x4]\n\ ldr r1, [sp, 0x4]\n\
ldrh r1, [r1, 0x2]\n\ ldrh r1, [r1, 0x2]\n\
mov r10, r1\n\ mov r10, r1\n\
ldr r2, [sp, 0x4]\n\ ldr r2, [sp, 0x4]\n\
ldrh r1, [r2]\n\ ldrh r1, [r2]\n\
lsls r4, r1, 10\n\ lsls r4, r1, 10\n\
ldrh r3, [r5]\n\ ldrh r3, [r5]\n\
str r3, [sp, 0x8]\n\ str r3, [sp, 0x8]\n\
mov r2, r10\n\ mov r2, r10\n\
_081D22C6:\n\ _081D22C6:\n\
subs r0, r2\n\ subs r0, r2\n\
lsls r0, 16\n\ lsls r0, 16\n\
lsrs r0, 16\n\ lsrs r0, 16\n\
mov r8, r0\n\ mov r8, r0\n\
cmp r0, 0\n\ cmp r0, 0\n\
beq _081D22DE\n\ beq _081D22DE\n\
subs r0, r3, r1\n\ subs r0, r3, r1\n\
lsls r0, 10\n\ lsls r0, 10\n\
mov r1, r8\n\ mov r1, r8\n\
bl __divsi3\n\ bl __divsi3\n\
str r0, [sp, 0xC]\n\ str r0, [sp, 0xC]\n\
_081D22DE:\n\ _081D22DE:\n\
mov r0, r8\n\ mov r0, r8\n\
adds r0, 0x1\n\ adds r0, 0x1\n\
lsls r0, 16\n\ lsls r0, 16\n\
lsrs r0, 16\n\ lsrs r0, 16\n\
mov r8, r0\n\ mov r8, r0\n\
cmp r7, 0\n\ cmp r7, 0\n\
bne _081D2328\n\ bne _081D2328\n\
mov r0, r10\n\ mov r0, r10\n\
subs r0, 0x38\n\ subs r0, 0x38\n\
lsls r0, 2\n\ lsls r0, 2\n\
adds r6, r0\n\ adds r6, r0\n\
movs r5, 0\n\ movs r5, 0\n\
mov r3, r9\n\ mov r3, r9\n\
lsls r3, 1\n\ lsls r3, 1\n\
mov r12, r3\n\ mov r12, r3\n\
ldr r0, [sp, 0x8]\n\ ldr r0, [sp, 0x8]\n\
add r0, r9\n\ add r0, r9\n\
str r0, [sp, 0x10]\n\ str r0, [sp, 0x10]\n\
cmp r7, r8\n\ cmp r7, r8\n\
bcs _081D23B6\n\ bcs _081D23B6\n\
movs r7, 0x1\n\ movs r7, 0x1\n\
_081D2308:\n\ _081D2308:\n\
adds r2, r3, r6\n\ adds r2, r3, r6\n\
asrs r1, r4, 10\n\ asrs r1, r4, 10\n\
asrs r0, r4, 9\n\ asrs r0, r4, 9\n\
ands r0, r7\n\ ands r0, r7\n\
adds r1, r0\n\ adds r1, r0\n\
add r1, r9\n\ add r1, r9\n\
strh r1, [r2]\n\ strh r1, [r2]\n\
ldr r1, [sp, 0xC]\n\ ldr r1, [sp, 0xC]\n\
adds r4, r1\n\ adds r4, r1\n\
adds r6, 0x4\n\ adds r6, 0x4\n\
adds r0, r5, 0x1\n\ adds r0, r5, 0x1\n\
lsls r0, 16\n\ lsls r0, 16\n\
lsrs r5, r0, 16\n\ lsrs r5, r0, 16\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcc _081D2308\n\ bcc _081D2308\n\
b _081D23B6\n\ b _081D23B6\n\
_081D2328:\n\ _081D2328:\n\
ldr r2, [sp, 0xC]\n\ ldr r2, [sp, 0xC]\n\
cmp r2, 0\n\ cmp r2, 0\n\
ble _081D23C0\n\ ble _081D23C0\n\
mov r0, r10\n\ mov r0, r10\n\
subs r0, 0x38\n\ subs r0, 0x38\n\
lsls r0, 2\n\ lsls r0, 2\n\
adds r7, r0\n\ adds r7, r0\n\
movs r5, 0\n\ movs r5, 0\n\
mov r3, r9\n\ mov r3, r9\n\
lsls r3, 1\n\ lsls r3, 1\n\
mov r12, r3\n\ mov r12, r3\n\
ldr r0, [sp, 0x8]\n\ ldr r0, [sp, 0x8]\n\
add r0, r9\n\ add r0, r9\n\
str r0, [sp, 0x10]\n\ str r0, [sp, 0x10]\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcs _081D237A\n\ bcs _081D237A\n\
ldr r0, =0x00026bff\n\ ldr r0, =0x00026bff\n\
cmp r4, r0\n\ cmp r4, r0\n\
bgt _081D237A\n\ bgt _081D237A\n\
mov r1, r12\n\ mov r1, r12\n\
str r1, [sp, 0x14]\n\ str r1, [sp, 0x14]\n\
_081D2352:\n\ _081D2352:\n\
ldr r3, [sp, 0x14]\n\ ldr r3, [sp, 0x14]\n\
adds r2, r3, r7\n\ adds r2, r3, r7\n\
asrs r1, r4, 10\n\ asrs r1, r4, 10\n\
asrs r0, r4, 9\n\ asrs r0, r4, 9\n\
movs r3, 0x1\n\ movs r3, 0x1\n\
ands r0, r3\n\ ands r0, r3\n\
adds r1, r0\n\ adds r1, r0\n\
add r1, r9\n\ add r1, r9\n\
strh r1, [r2]\n\ strh r1, [r2]\n\
ldr r0, [sp, 0xC]\n\ ldr r0, [sp, 0xC]\n\
adds r4, r0\n\ adds r4, r0\n\
adds r7, 0x4\n\ adds r7, 0x4\n\
adds r0, r5, 0x1\n\ adds r0, r5, 0x1\n\
lsls r0, 16\n\ lsls r0, 16\n\
lsrs r5, r0, 16\n\ lsrs r5, r0, 16\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcs _081D237A\n\ bcs _081D237A\n\
ldr r1, =0x00026bff\n\ ldr r1, =0x00026bff\n\
cmp r4, r1\n\ cmp r4, r1\n\
ble _081D2352\n\ ble _081D2352\n\
_081D237A:\n\ _081D237A:\n\
mov r2, r10\n\ mov r2, r10\n\
adds r1, r2, r5\n\ adds r1, r2, r5\n\
ldr r3, [sp]\n\ ldr r3, [sp]\n\
movs r2, 0xD4\n\ movs r2, 0xD4\n\
lsls r2, 2\n\ lsls r2, 2\n\
adds r0, r3, r2\n\ adds r0, r3, r2\n\
strh r1, [r0]\n\ strh r1, [r0]\n\
ldrh r0, [r0]\n\ ldrh r0, [r0]\n\
subs r0, 0x38\n\ subs r0, 0x38\n\
lsls r0, 2\n\ lsls r0, 2\n\
adds r6, r0\n\ adds r6, r0\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcs _081D23B6\n\ bcs _081D23B6\n\
mov r3, r12\n\ mov r3, r12\n\
movs r7, 0x1\n\ movs r7, 0x1\n\
_081D2398:\n\ _081D2398:\n\
adds r2, r3, r6\n\ adds r2, r3, r6\n\
asrs r1, r4, 10\n\ asrs r1, r4, 10\n\
asrs r0, r4, 9\n\ asrs r0, r4, 9\n\
ands r0, r7\n\ ands r0, r7\n\
adds r1, r0\n\ adds r1, r0\n\
add r1, r9\n\ add r1, r9\n\
strh r1, [r2]\n\ strh r1, [r2]\n\
ldr r0, [sp, 0xC]\n\ ldr r0, [sp, 0xC]\n\
adds r4, r0\n\ adds r4, r0\n\
adds r6, 0x4\n\ adds r6, 0x4\n\
adds r0, r5, 0x1\n\ adds r0, r5, 0x1\n\
lsls r0, 16\n\ lsls r0, 16\n\
lsrs r5, r0, 16\n\ lsrs r5, r0, 16\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcc _081D2398\n\ bcc _081D2398\n\
_081D23B6:\n\ _081D23B6:\n\
subs r0, r6, 0x4\n\ subs r0, r6, 0x4\n\
b _081D248C\n\ b _081D248C\n\
.pool\n\ .pool\n\
_081D23C0:\n\ _081D23C0:\n\
ldr r1, [sp, 0xC]\n\ ldr r1, [sp, 0xC]\n\
cmp r1, 0\n\ cmp r1, 0\n\
bge _081D2464\n\ bge _081D2464\n\
mov r0, r10\n\ mov r0, r10\n\
subs r0, 0x38\n\ subs r0, 0x38\n\
lsls r0, 2\n\ lsls r0, 2\n\
adds r6, r0\n\ adds r6, r0\n\
movs r5, 0\n\ movs r5, 0\n\
mov r2, r9\n\ mov r2, r9\n\
lsls r2, 1\n\ lsls r2, 1\n\
mov r12, r2\n\ mov r12, r2\n\
ldr r3, [sp, 0x8]\n\ ldr r3, [sp, 0x8]\n\
add r3, r9\n\ add r3, r9\n\
str r3, [sp, 0x10]\n\ str r3, [sp, 0x10]\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcs _081D241E\n\ bcs _081D241E\n\
adds r3, r2, r6\n\ adds r3, r2, r6\n\
asrs r1, r4, 10\n\ asrs r1, r4, 10\n\
asrs r0, r4, 9\n\ asrs r0, r4, 9\n\
movs r2, 0x1\n\ movs r2, 0x1\n\
ands r0, r2\n\ ands r0, r2\n\
adds r1, r0\n\ adds r1, r0\n\
add r1, r9\n\ add r1, r9\n\
strh r1, [r3]\n\ strh r1, [r3]\n\
b _081D2414\n\ b _081D2414\n\
_081D23F2:\n\ _081D23F2:\n\
ldr r0, [sp, 0xC]\n\ ldr r0, [sp, 0xC]\n\
adds r4, r0\n\ adds r4, r0\n\
adds r6, 0x4\n\ adds r6, 0x4\n\
adds r0, r5, 0x1\n\ adds r0, r5, 0x1\n\
lsls r0, 16\n\ lsls r0, 16\n\
lsrs r5, r0, 16\n\ lsrs r5, r0, 16\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcs _081D241E\n\ bcs _081D241E\n\
mov r1, r12\n\ mov r1, r12\n\
adds r3, r1, r6\n\ adds r3, r1, r6\n\
asrs r2, r4, 10\n\ asrs r2, r4, 10\n\
asrs r0, r4, 9\n\ asrs r0, r4, 9\n\
movs r1, 0x1\n\ movs r1, 0x1\n\
ands r0, r1\n\ ands r0, r1\n\
adds r2, r0\n\ adds r2, r0\n\
add r2, r9\n\ add r2, r9\n\
strh r2, [r3]\n\ strh r2, [r3]\n\
_081D2414:\n\ _081D2414:\n\
ldr r0, =0x00026bff\n\ ldr r0, =0x00026bff\n\
cmp r4, r0\n\ cmp r4, r0\n\
bgt _081D23F2\n\ bgt _081D23F2\n\
movs r0, 0x9B\n\ movs r0, 0x9B\n\
strh r0, [r3]\n\ strh r0, [r3]\n\
_081D241E:\n\ _081D241E:\n\
mov r2, r10\n\ mov r2, r10\n\
adds r1, r2, r5\n\ adds r1, r2, r5\n\
ldr r3, [sp]\n\ ldr r3, [sp]\n\
movs r2, 0xD4\n\ movs r2, 0xD4\n\
lsls r2, 2\n\ lsls r2, 2\n\
adds r0, r3, r2\n\ adds r0, r3, r2\n\
strh r1, [r0]\n\ strh r1, [r0]\n\
ldrh r0, [r0]\n\ ldrh r0, [r0]\n\
subs r0, 0x38\n\ subs r0, 0x38\n\
lsls r0, 2\n\ lsls r0, 2\n\
adds r7, r0\n\ adds r7, r0\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcs _081D245A\n\ bcs _081D245A\n\
mov r3, r12\n\ mov r3, r12\n\
movs r6, 0x1\n\ movs r6, 0x1\n\
_081D243C:\n\ _081D243C:\n\
adds r2, r3, r7\n\ adds r2, r3, r7\n\
asrs r1, r4, 10\n\ asrs r1, r4, 10\n\
asrs r0, r4, 9\n\ asrs r0, r4, 9\n\
ands r0, r6\n\ ands r0, r6\n\
adds r1, r0\n\ adds r1, r0\n\
add r1, r9\n\ add r1, r9\n\
strh r1, [r2]\n\ strh r1, [r2]\n\
ldr r0, [sp, 0xC]\n\ ldr r0, [sp, 0xC]\n\
adds r4, r0\n\ adds r4, r0\n\
adds r7, 0x4\n\ adds r7, 0x4\n\
adds r0, r5, 0x1\n\ adds r0, r5, 0x1\n\
lsls r0, 16\n\ lsls r0, 16\n\
lsrs r5, r0, 16\n\ lsrs r5, r0, 16\n\
cmp r5, r8\n\ cmp r5, r8\n\
bcc _081D243C\n\ bcc _081D243C\n\
_081D245A:\n\ _081D245A:\n\
subs r0, r7, 0x4\n\ subs r0, r7, 0x4\n\
b _081D248C\n\ b _081D248C\n\
.pool\n\ .pool\n\
_081D2464:\n\ _081D2464:\n\
ldr r1, [sp]\n\ ldr r1, [sp]\n\
movs r2, 0xD4\n\ movs r2, 0xD4\n\
lsls r2, 2\n\ lsls r2, 2\n\
adds r0, r1, r2\n\ adds r0, r1, r2\n\
mov r3, r10\n\ mov r3, r10\n\
strh r3, [r0]\n\ strh r3, [r0]\n\
mov r0, r10\n\ mov r0, r10\n\
subs r0, 0x38\n\ subs r0, 0x38\n\
lsls r0, 2\n\ lsls r0, 2\n\
adds r6, r0\n\ adds r6, r0\n\
adds r7, r0\n\ adds r7, r0\n\
ldrh r0, [r5]\n\ ldrh r0, [r5]\n\
adds r0, 0x1\n\ adds r0, 0x1\n\
strh r0, [r6, 0x2]\n\ strh r0, [r6, 0x2]\n\
ldr r1, [sp, 0x4]\n\ ldr r1, [sp, 0x4]\n\
ldrh r0, [r1]\n\ ldrh r0, [r1]\n\
strh r0, [r7]\n\ strh r0, [r7]\n\
movs r0, 0x9B\n\ movs r0, 0x9B\n\
strh r0, [r7, 0x2]\n\ strh r0, [r7, 0x2]\n\
b _081D2494\n\ b _081D2494\n\
_081D248C:\n\ _081D248C:\n\
add r0, r12\n\ add r0, r12\n\
mov r2, sp\n\ mov r2, sp\n\
ldrh r2, [r2, 0x10]\n\ ldrh r2, [r2, 0x10]\n\
strh r2, [r0]\n\ strh r2, [r0]\n\
_081D2494:\n\ _081D2494:\n\
add sp, 0x18\n\ add sp, 0x18\n\
pop {r3-r5}\n\ pop {r3-r5}\n\
mov r8, r3\n\ mov r8, r3\n\
mov r9, r4\n\ mov r9, r4\n\
mov r10, r5\n\ mov r10, r5\n\
pop {r4-r7}\n\ pop {r4-r7}\n\
pop {r0}\n\ pop {r0}\n\
bx r0\n\ bx r0\n\
.syntax divided"); ");
} }
static void sub_81D24A4(struct UnknownStruct_81D1ED4 *arg0) static void sub_81D24A4(struct UnknownStruct_81D1ED4 *arg0)

View File

@ -203,14 +203,14 @@ void sub_8166380(void)
gUnknown_0203BC90->field_50++; gUnknown_0203BC90->field_50++;
break; break;
case 11: case 11:
sub_81D2754(&gUnknown_0203BCAC->field_7C58, gUnknown_0203BCAC->field_7C58.unk14[0]); sub_81D2754(gUnknown_0203BCAC->field_7C58.unk0[0], gUnknown_0203BCAC->field_7C58.unk14[0]);
sub_81D20AC(&gUnknown_0203BCAC->field_7C58); sub_81D20AC(&gUnknown_0203BCAC->field_7C58);
gUnknown_0203BC90->field_50++; gUnknown_0203BC90->field_50++;
break; break;
case 12: case 12:
if (!sub_81D20BC(&gUnknown_0203BCAC->field_7C58)) if (!sub_81D20BC(&gUnknown_0203BCAC->field_7C58))
{ {
sub_81D1F84(&gUnknown_0203BCAC->field_7C58, gUnknown_0203BCAC->field_7C58.unk14, gUnknown_0203BCAC->field_7C58.unk14); sub_81D1F84(&gUnknown_0203BCAC->field_7C58, gUnknown_0203BCAC->field_7C58.unk14[0], gUnknown_0203BCAC->field_7C58.unk14[0]);
gUnknown_0203BC90->field_50++; gUnknown_0203BC90->field_50++;
} }
break; break;