mirror of
https://github.com/Ninjdai1/pokeemerald.git
synced 2024-12-30 14:20:42 +01:00
554210c5e3
Command used for the job: egrep -rl ' $' --include *.c --include *.h --include *.s --include *.inc --include *.txt * | xargs sed -i 's/\s\+$//g' Credits to Grant Murphy from Stack Overflow.
651 lines
16 KiB
C
651 lines
16 KiB
C
#include "librfu.h"
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static void STWI_intr_timer(void);
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static u16 STWI_init(u8 request);
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static s32 STWI_start_Command(void);
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static void STWI_set_timer(u8 unk);
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static void STWI_stop_timer(void);
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static s32 STWI_restart_Command(void);
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static s32 STWI_reset_ClockCounter(void);
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struct STWIStatus *gSTWIStatus;
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void STWI_init_all(struct RfuIntrStruct *interruptStruct, IntrFunc *interrupt, bool8 copyInterruptToRam)
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{
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// If we're copying our interrupt into RAM, DMA it to block1 and use
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// block2 for our STWIStatus, otherwise block1 holds the STWIStatus.
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// interrupt usually is a pointer to gIntrTable[1]
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if (copyInterruptToRam == TRUE)
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{
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*interrupt = (IntrFunc)interruptStruct->block1;
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DmaCopy16(3, &IntrSIO32, interruptStruct->block1, sizeof(interruptStruct->block1));
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gSTWIStatus = &interruptStruct->block2;
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}
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else
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{
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*interrupt = IntrSIO32;
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gSTWIStatus = (struct STWIStatus *)interruptStruct->block1;
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}
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gSTWIStatus->rxPacket = &interruptStruct->rxPacketAlloc;
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gSTWIStatus->txPacket = &interruptStruct->txPacketAlloc;
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gSTWIStatus->msMode = AGB_CLK_MASTER;
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gSTWIStatus->state = 0; // master send req
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gSTWIStatus->reqLength = 0;
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gSTWIStatus->reqNext = 0;
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gSTWIStatus->ackLength = 0;
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gSTWIStatus->ackNext = 0;
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gSTWIStatus->ackActiveCommand = 0;
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gSTWIStatus->timerState = 0;
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gSTWIStatus->timerActive = 0;
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gSTWIStatus->error = 0;
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gSTWIStatus->recoveryCount = 0;
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gSTWIStatus->sending = 0;
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REG_RCNT = 0x100; // TODO: mystery bit?
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REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
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STWI_init_Callback_M();
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STWI_init_Callback_S();
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IntrEnable(INTR_FLAG_SERIAL);
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}
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void STWI_init_timer(IntrFunc *interrupt, s32 timerSelect)
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{
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*interrupt = STWI_intr_timer;
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gSTWIStatus->timerSelect = timerSelect;
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IntrEnable(INTR_FLAG_TIMER0 << gSTWIStatus->timerSelect);
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}
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void AgbRFU_SoftReset(void)
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{
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vu16 *timerL;
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vu16 *timerH;
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REG_RCNT = 0x8000;
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REG_RCNT = 0x80A0; // all these bits are undocumented
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timerL = ®_TMCNT_L(gSTWIStatus->timerSelect);
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timerH = ®_TMCNT_H(gSTWIStatus->timerSelect);
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*timerH = 0;
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*timerL = 0;
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*timerH = TIMER_ENABLE | TIMER_1024CLK;
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while (*timerL <= 0x11)
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REG_RCNT = 0x80A2;
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*timerH = 3;
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REG_RCNT = 0x80A0;
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REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
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gSTWIStatus->state = 0; // master send req
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gSTWIStatus->reqLength = 0;
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gSTWIStatus->reqNext = 0;
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gSTWIStatus->reqActiveCommand = 0;
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gSTWIStatus->ackLength = 0;
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gSTWIStatus->ackNext = 0;
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gSTWIStatus->ackActiveCommand = 0;
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gSTWIStatus->timerState = 0;
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gSTWIStatus->timerActive = 0;
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gSTWIStatus->error = 0;
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gSTWIStatus->msMode = AGB_CLK_MASTER;
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gSTWIStatus->recoveryCount = 0;
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gSTWIStatus->sending = 0;
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}
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void STWI_set_MS_mode(u8 mode)
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{
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gSTWIStatus->msMode = mode;
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}
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u16 STWI_read_status(u8 index)
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{
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switch (index)
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{
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case 0:
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return gSTWIStatus->error;
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case 1:
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return gSTWIStatus->msMode;
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case 2:
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return gSTWIStatus->state;
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case 3:
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return gSTWIStatus->reqActiveCommand;
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default:
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return 0xFFFF;
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}
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}
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void STWI_init_Callback_M(void)
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{
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STWI_set_Callback_M(NULL);
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}
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void STWI_init_Callback_S(void)
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{
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STWI_set_Callback_S(NULL);
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}
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// The callback can take 2 or 3 arguments.
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void STWI_set_Callback_M(void *callbackM)
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{
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gSTWIStatus->callbackM = callbackM;
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}
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void STWI_set_Callback_S(void (*callbackS)(u16))
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{
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gSTWIStatus->callbackS = callbackS;
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}
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void STWI_set_Callback_ID(void (*func)(void)) // name in SDK, but is actually setting a function pointer
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{
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gSTWIStatus->callbackID = func;
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}
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u16 STWI_poll_CommandEnd(void)
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{
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while (gSTWIStatus->sending == 1)
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;
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return gSTWIStatus->error;
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}
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void STWI_send_ResetREQ(void)
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{
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if (!STWI_init(ID_RESET_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_LinkStatusREQ(void)
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{
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if (!STWI_init(ID_LINK_STATUS_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_VersionStatusREQ(void)
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{
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if (!STWI_init(ID_VERSION_STATUS_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_SystemStatusREQ(void)
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{
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if (!STWI_init(ID_SYSTEM_STATUS_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_SlotStatusREQ(void)
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{
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if (!STWI_init(ID_SLOT_STATUS_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_ConfigStatusREQ(void)
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{
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if (!STWI_init(ID_CONFIG_STATUS_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_GameConfigREQ(const u8 *serial_gname, const u8 *uname)
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{
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u8 *packetBytes;
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s32 i;
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if (!STWI_init(ID_GAME_CONFIG_REQ))
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{
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gSTWIStatus->reqLength = 6;
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packetBytes = gSTWIStatus->txPacket->rfuPacket8.data;
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packetBytes += sizeof(u32);
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*(u16 *)packetBytes = *(u16 *)serial_gname;
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packetBytes += sizeof(u16);
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serial_gname += sizeof(u16);
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for (i = 0; i < 14; ++i)
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{
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*packetBytes = *serial_gname;
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++packetBytes;
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++serial_gname;
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}
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for (i = 0; i < 8; ++i)
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{
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*packetBytes = *uname;
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++packetBytes;
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++uname;
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}
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STWI_start_Command();
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}
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}
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void STWI_send_SystemConfigREQ(u16 availSlotFlag, u8 maxMFrame, u8 mcTimer)
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{
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if (!STWI_init(ID_SYSTEM_CONFIG_REQ))
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{
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u8 *packetBytes;
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gSTWIStatus->reqLength = 1;
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packetBytes = gSTWIStatus->txPacket->rfuPacket8.data;
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packetBytes += sizeof(u32);
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*packetBytes++ = mcTimer;
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*packetBytes++ = maxMFrame;
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*(u16*)packetBytes = availSlotFlag;
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STWI_start_Command();
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}
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}
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void STWI_send_SC_StartREQ(void)
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{
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if (!STWI_init(ID_SC_START_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_SC_PollingREQ(void)
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{
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if (!STWI_init(ID_SC_POLL_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_SC_EndREQ(void)
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{
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if (!STWI_init(ID_SC_END_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_SP_StartREQ(void)
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{
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if (!STWI_init(ID_SP_START_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_SP_PollingREQ(void)
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{
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if (!STWI_init(ID_SP_POLL_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_SP_EndREQ(void)
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{
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if (!STWI_init(ID_SP_END_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_CP_StartREQ(u16 unk1)
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{
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if (!STWI_init(ID_CP_START_REQ))
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{
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gSTWIStatus->reqLength = 1;
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gSTWIStatus->txPacket->rfuPacket32.data[0] = unk1;
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STWI_start_Command();
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}
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}
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void STWI_send_CP_PollingREQ(void)
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{
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if (!STWI_init(ID_CP_POLL_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_CP_EndREQ(void)
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{
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if (!STWI_init(ID_CP_END_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_DataTxREQ(const void *in, u8 size)
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{
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if (!STWI_init(ID_DATA_TX_REQ))
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{
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u8 reqLength = (size / sizeof(u32));
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if (size & (sizeof(u32) - 1))
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reqLength += 1;
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gSTWIStatus->reqLength = reqLength;
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CpuCopy32(in, gSTWIStatus->txPacket->rfuPacket32.data, gSTWIStatus->reqLength * sizeof(u32));
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STWI_start_Command();
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}
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}
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void STWI_send_DataTxAndChangeREQ(const void *in, u8 size)
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{
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if (!STWI_init(ID_DATA_TX_AND_CHANGE_REQ))
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{
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u8 reqLength = (size / sizeof(u32));
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if (size & (sizeof(u32) - 1))
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reqLength += 1;
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gSTWIStatus->reqLength = reqLength;
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CpuCopy32(in, gSTWIStatus->txPacket->rfuPacket32.data, gSTWIStatus->reqLength * sizeof(u32));
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STWI_start_Command();
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}
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}
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void STWI_send_DataRxREQ(void)
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{
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if (!STWI_init(ID_DATA_RX_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_MS_ChangeREQ(void)
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{
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if (!STWI_init(ID_MS_CHANGE_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_DataReadyAndChangeREQ(u8 unk)
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{
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if (!STWI_init(ID_DATA_READY_AND_CHANGE_REQ))
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{
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if (!unk)
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{
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gSTWIStatus->reqLength = 0;
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}
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else
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{
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u8 *packetBytes;
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gSTWIStatus->reqLength = 1;
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packetBytes = gSTWIStatus->txPacket->rfuPacket8.data;
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packetBytes += sizeof(u32);
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*packetBytes++ = unk;
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*packetBytes++ = 0;
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*packetBytes++ = 0;
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*packetBytes = 0;
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}
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STWI_start_Command();
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}
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}
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void STWI_send_DisconnectedAndChangeREQ(u8 unk0, u8 unk1)
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{
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if (!STWI_init(ID_DISCONNECTED_AND_CHANGE_REQ))
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{
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u8 *packetBytes;
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gSTWIStatus->reqLength = 1;
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packetBytes = gSTWIStatus->txPacket->rfuPacket8.data;
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packetBytes += sizeof(u32);
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*packetBytes++ = unk0;
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*packetBytes++ = unk1;
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*packetBytes++ = 0;
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*packetBytes = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_ResumeRetransmitAndChangeREQ(void)
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{
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if (!STWI_init(ID_RESUME_RETRANSMIT_AND_CHANGE_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_DisconnectREQ(u8 unk)
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{
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if (!STWI_init(ID_DISCONNECT_REQ))
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{
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gSTWIStatus->reqLength = 1;
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gSTWIStatus->txPacket->rfuPacket32.data[0] = unk;
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STWI_start_Command();
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}
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}
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void STWI_send_TestModeREQ(u8 unk0, u8 unk1)
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{
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if (!STWI_init(ID_TEST_MODE_REQ))
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{
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gSTWIStatus->reqLength = 1;
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gSTWIStatus->txPacket->rfuPacket32.data[0] = unk0 | (unk1 << 8);
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STWI_start_Command();
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}
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}
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void STWI_send_CPR_StartREQ(u16 unk0, u16 unk1, u8 unk2)
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{
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u32 *packetData;
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u32 arg1;
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if (!STWI_init(ID_CPR_START_REQ))
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{
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gSTWIStatus->reqLength = 2;
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arg1 = unk1 | (unk0 << 16);
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packetData = gSTWIStatus->txPacket->rfuPacket32.data;
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packetData[0] = arg1;
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packetData[1] = unk2;
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STWI_start_Command();
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}
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}
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void STWI_send_CPR_PollingREQ(void)
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{
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if (!STWI_init(ID_CPR_POLL_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_CPR_EndREQ(void)
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{
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if (!STWI_init(ID_CPR_END_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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void STWI_send_StopModeREQ(void)
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{
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if (!STWI_init(ID_STOP_MODE_REQ))
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{
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gSTWIStatus->reqLength = 0;
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STWI_start_Command();
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}
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}
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static void STWI_intr_timer(void)
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{
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switch (gSTWIStatus->timerState)
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{
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// TODO: Make an enum for these
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case 2:
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gSTWIStatus->timerActive = 1;
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STWI_set_timer(50);
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break;
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case 1:
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case 4:
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STWI_stop_timer();
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STWI_restart_Command();
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break;
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case 3:
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gSTWIStatus->timerActive = 1;
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STWI_stop_timer();
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STWI_reset_ClockCounter();
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if (gSTWIStatus->callbackM != NULL)
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gSTWIStatus->callbackM(ID_CLOCK_SLAVE_MS_CHANGE_ERROR_BY_DMA_REQ, 0);
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break;
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}
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}
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static void STWI_set_timer(u8 count)
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{
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vu16 *timerL = ®_TMCNT_L(gSTWIStatus->timerSelect);
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vu16 *timerH = ®_TMCNT_H(gSTWIStatus->timerSelect);
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REG_IME = 0;
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switch (count)
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{
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case 50:
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*timerL = 0xFCCB;
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gSTWIStatus->timerState = 1;
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break;
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case 80:
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*timerL = 0xFAE0;
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gSTWIStatus->timerState = 2;
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break;
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case 100:
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*timerL = 0xF996;
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gSTWIStatus->timerState = 3;
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break;
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case 130:
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*timerL = 0xF7AD;
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gSTWIStatus->timerState = 4;
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break;
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|
}
|
|
*timerH = TIMER_ENABLE | TIMER_INTR_ENABLE | TIMER_1024CLK;
|
|
REG_IF = INTR_FLAG_TIMER0 << gSTWIStatus->timerSelect;
|
|
REG_IME = 1;
|
|
}
|
|
|
|
static void STWI_stop_timer(void)
|
|
{
|
|
gSTWIStatus->timerState = 0;
|
|
REG_TMCNT_L(gSTWIStatus->timerSelect) = 0;
|
|
REG_TMCNT_H(gSTWIStatus->timerSelect) = 0;
|
|
}
|
|
|
|
/*
|
|
* Set up STWI to send REQ. Returns 1 if error (see below).
|
|
*/
|
|
static u16 STWI_init(u8 request)
|
|
{
|
|
if (!REG_IME)
|
|
{
|
|
// Can't start sending if IME is disabled.
|
|
gSTWIStatus->error = ERR_REQ_CMD_IME_DISABLE;
|
|
if (gSTWIStatus->callbackM != NULL)
|
|
gSTWIStatus->callbackM(request, gSTWIStatus->error);
|
|
return TRUE;
|
|
}
|
|
else if (gSTWIStatus->sending == 1)
|
|
{
|
|
// Already sending something. Cancel and error.
|
|
gSTWIStatus->error = ERR_REQ_CMD_SENDING;
|
|
gSTWIStatus->sending = 0;
|
|
if (gSTWIStatus->callbackM != NULL)
|
|
gSTWIStatus->callbackM(request, gSTWIStatus->error);
|
|
return TRUE;
|
|
}
|
|
else if (gSTWIStatus->msMode == AGB_CLK_SLAVE)
|
|
{
|
|
// Can't send if clock slave
|
|
gSTWIStatus->error = ERR_REQ_CMD_CLOCK_SLAVE;
|
|
if (gSTWIStatus->callbackM != NULL)
|
|
gSTWIStatus->callbackM(request, gSTWIStatus->error, gSTWIStatus);
|
|
return TRUE;
|
|
}
|
|
else
|
|
{
|
|
// Good to go, start sending
|
|
gSTWIStatus->sending = 1;
|
|
gSTWIStatus->reqActiveCommand = request;
|
|
gSTWIStatus->state = 0; // master send req
|
|
gSTWIStatus->reqLength = 0;
|
|
gSTWIStatus->reqNext = 0;
|
|
gSTWIStatus->ackLength = 0;
|
|
gSTWIStatus->ackNext = 0;
|
|
gSTWIStatus->ackActiveCommand = 0;
|
|
gSTWIStatus->timerState = 0;
|
|
gSTWIStatus->timerActive = 0;
|
|
gSTWIStatus->error = 0;
|
|
gSTWIStatus->recoveryCount = 0;
|
|
REG_RCNT = 0x100;
|
|
REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
|
|
return FALSE;
|
|
}
|
|
}
|
|
|
|
static s32 STWI_start_Command(void)
|
|
{
|
|
u16 imeTemp;
|
|
|
|
// equivalent to gSTWIStatus->txPacket->rfuPacket32.command,
|
|
// but the cast here is required to avoid register issue
|
|
*(u32 *)gSTWIStatus->txPacket->rfuPacket8.data = 0x99660000 | (gSTWIStatus->reqLength << 8) | gSTWIStatus->reqActiveCommand;
|
|
REG_SIODATA32 = gSTWIStatus->txPacket->rfuPacket32.command;
|
|
gSTWIStatus->state = 0; // master send req
|
|
gSTWIStatus->reqNext = 1;
|
|
imeTemp = REG_IME;
|
|
REG_IME = 0;
|
|
REG_IE |= (INTR_FLAG_TIMER0 << gSTWIStatus->timerSelect);
|
|
REG_IE |= INTR_FLAG_SERIAL;
|
|
REG_IME = imeTemp;
|
|
REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_MULTI_BUSY | SIO_115200_BPS;
|
|
return 0;
|
|
}
|
|
|
|
static s32 STWI_restart_Command(void)
|
|
{
|
|
if (gSTWIStatus->recoveryCount < 2)
|
|
{
|
|
++gSTWIStatus->recoveryCount;
|
|
STWI_start_Command();
|
|
}
|
|
else
|
|
{
|
|
if (gSTWIStatus->reqActiveCommand == ID_MS_CHANGE_REQ || gSTWIStatus->reqActiveCommand == ID_DATA_TX_AND_CHANGE_REQ || gSTWIStatus->reqActiveCommand == ID_UNK35_REQ || gSTWIStatus->reqActiveCommand == ID_RESUME_RETRANSMIT_AND_CHANGE_REQ)
|
|
{
|
|
gSTWIStatus->error = ERR_REQ_CMD_CLOCK_DRIFT;
|
|
gSTWIStatus->sending = 0;
|
|
if (gSTWIStatus->callbackM != NULL)
|
|
gSTWIStatus->callbackM(gSTWIStatus->reqActiveCommand, gSTWIStatus->error);
|
|
}
|
|
else
|
|
{
|
|
gSTWIStatus->error = ERR_REQ_CMD_CLOCK_DRIFT;
|
|
gSTWIStatus->sending = 0;
|
|
if (gSTWIStatus->callbackM != NULL)
|
|
gSTWIStatus->callbackM(gSTWIStatus->reqActiveCommand, gSTWIStatus->error);
|
|
gSTWIStatus->state = 4; // error
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static s32 STWI_reset_ClockCounter(void)
|
|
{
|
|
gSTWIStatus->state = 5; // slave receive req init
|
|
gSTWIStatus->reqLength = 0;
|
|
gSTWIStatus->reqNext = 0;
|
|
REG_SIODATA32 = (1 << 31);
|
|
REG_SIOCNT = 0;
|
|
REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
|
|
REG_SIOCNT = (SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS) + 0x7F;
|
|
return 0;
|
|
}
|