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https://github.com/dolphin-emu/dolphin.git
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4f02132f93
Our defines were never clear between what meant 64bit or x86_64 This makes a clear cut between bitness and architecture. This commit also has the side effect of bringing up aarch64 compiling support.
274 lines
6.7 KiB
C++
274 lines
6.7 KiB
C++
// Copyright 2013 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <cstring>
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#include <string>
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#include "Common/Common.h"
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#include "Common/CPUDetect.h"
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#ifdef _WIN32
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#define _interlockedbittestandset workaround_ms_header_bug_platform_sdk6_set
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#define _interlockedbittestandreset workaround_ms_header_bug_platform_sdk6_reset
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#define _interlockedbittestandset64 workaround_ms_header_bug_platform_sdk6_set64
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#define _interlockedbittestandreset64 workaround_ms_header_bug_platform_sdk6_reset64
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#include <intrin.h>
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#undef _interlockedbittestandset
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#undef _interlockedbittestandreset
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#undef _interlockedbittestandset64
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#undef _interlockedbittestandreset64
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#else
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//#include <config/i386/cpuid.h>
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#ifndef _M_GENERIC
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#include <xmmintrin.h>
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#endif
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#if defined __FreeBSD__
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#include <sys/types.h>
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#include <machine/cpufunc.h>
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#else
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static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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#if defined _M_GENERIC
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(*eax) = (*ebx) = (*ecx) = (*edx) = 0;
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#elif defined _LP64
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// Note: EBX is reserved on Mac OS X and in PIC on Linux, so it has to
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// restored at the end of the asm block.
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__asm__ (
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"cpuid;"
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"movl %%ebx,%1;"
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: "=a" (*eax),
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"=S" (*ebx),
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"=c" (*ecx),
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"=d" (*edx)
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: "a" (*eax)
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: "rbx"
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);
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#else
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__asm__ (
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"cpuid;"
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"movl %%ebx,%1;"
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: "=a" (*eax),
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"=S" (*ebx),
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"=c" (*ecx),
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"=d" (*edx)
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: "a" (*eax)
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: "ebx"
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);
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#endif
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}
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#endif /* defined __FreeBSD__ */
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static void __cpuid(int info[4], int x)
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{
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#if defined __FreeBSD__
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do_cpuid((unsigned int)x, (unsigned int*)info);
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#else
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unsigned int eax = x, ebx = 0, ecx = 0, edx = 0;
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do_cpuid(&eax, &ebx, &ecx, &edx);
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info[0] = eax;
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info[1] = ebx;
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info[2] = ecx;
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info[3] = edx;
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#endif
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}
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#define _XCR_XFEATURE_ENABLED_MASK 0
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static unsigned long long _xgetbv(unsigned int index)
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{
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#ifndef _M_GENERIC
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unsigned int eax, edx;
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__asm__ __volatile__("xgetbv" : "=a"(eax), "=d"(edx) : "c"(index));
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return ((unsigned long long)edx << 32) | eax;
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#endif
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}
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#endif
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CPUInfo cpu_info;
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CPUInfo::CPUInfo() {
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Detect();
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}
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// Detects the various cpu features
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void CPUInfo::Detect()
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{
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memset(this, 0, sizeof(*this));
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#if _M_X86_32
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Mode64bit = false;
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#elif _M_X86_64
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Mode64bit = true;
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OS64bit = true;
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#endif
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num_cores = 1;
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#ifdef _WIN32
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#if _M_X86_32
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BOOL f64 = false;
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IsWow64Process(GetCurrentProcess(), &f64);
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OS64bit = (f64 == TRUE) ? true : false;
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#endif
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#endif
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// Set obvious defaults, for extra safety
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if (Mode64bit) {
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bSSE = true;
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bSSE2 = true;
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bLongMode = true;
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}
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// Assume CPU supports the CPUID instruction. Those that don't can barely
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// boot modern OS:es anyway.
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int cpu_id[4];
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memset(cpu_string, 0, sizeof(cpu_string));
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// Detect CPU's CPUID capabilities, and grab cpu string
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__cpuid(cpu_id, 0x00000000);
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u32 max_std_fn = cpu_id[0]; // EAX
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*((int *)cpu_string) = cpu_id[1];
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*((int *)(cpu_string + 4)) = cpu_id[3];
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*((int *)(cpu_string + 8)) = cpu_id[2];
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__cpuid(cpu_id, 0x80000000);
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u32 max_ex_fn = cpu_id[0];
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if (!strcmp(cpu_string, "GenuineIntel"))
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vendor = VENDOR_INTEL;
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else if (!strcmp(cpu_string, "AuthenticAMD"))
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vendor = VENDOR_AMD;
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else
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vendor = VENDOR_OTHER;
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// Set reasonable default brand string even if brand string not available.
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strcpy(brand_string, cpu_string);
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// Detect family and other misc stuff.
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bool ht = false;
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HTT = ht;
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logical_cpu_count = 1;
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if (max_std_fn >= 1) {
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__cpuid(cpu_id, 0x00000001);
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logical_cpu_count = (cpu_id[1] >> 16) & 0xFF;
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ht = (cpu_id[3] >> 28) & 1;
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if ((cpu_id[3] >> 25) & 1) bSSE = true;
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if ((cpu_id[3] >> 26) & 1) bSSE2 = true;
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if ((cpu_id[2]) & 1) bSSE3 = true;
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if ((cpu_id[2] >> 9) & 1) bSSSE3 = true;
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if ((cpu_id[2] >> 19) & 1) bSSE4_1 = true;
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if ((cpu_id[2] >> 20) & 1) bSSE4_2 = true;
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if ((cpu_id[2] >> 25) & 1) bAES = true;
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// To check DAZ support, we first need to check FXSAVE support.
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if ((cpu_id[3] >> 24) & 1)
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{
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// We can use FXSAVE.
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bFXSR = true;
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GC_ALIGNED16(u8 fx_state[512]);
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memset(fx_state, 0, sizeof(fx_state));
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#ifdef _WIN32
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#if _M_X86_32
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_fxsave(fx_state);
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#elif _M_X86_64
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_fxsave64(fx_state);
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#endif
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#else
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__asm__("fxsave %0" : "=m" (fx_state));
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#endif
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// lowest byte of MXCSR_MASK
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if ((fx_state[0x1C] >> 6) & 1)
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{
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// On x86, the FTZ field (supported since SSE1) only flushes denormal _outputs_ to zero,
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// now that we checked DAZ support (flushing denormal _inputs_ to zero),
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// we can set our generic flag.
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bFlushToZero = true;
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}
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}
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// AVX support requires 3 separate checks:
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// - Is the AVX bit set in CPUID?
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// - Is the XSAVE bit set in CPUID?
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// - XGETBV result has the XCR bit set.
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if (((cpu_id[2] >> 28) & 1) && ((cpu_id[2] >> 27) & 1))
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{
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if ((_xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6)
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{
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bAVX = true;
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if ((cpu_id[2] >> 12) & 1)
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bFMA = true;
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}
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}
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}
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if (max_ex_fn >= 0x80000004) {
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// Extract brand string
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__cpuid(cpu_id, 0x80000002);
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memcpy(brand_string, cpu_id, sizeof(cpu_id));
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__cpuid(cpu_id, 0x80000003);
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memcpy(brand_string + 16, cpu_id, sizeof(cpu_id));
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__cpuid(cpu_id, 0x80000004);
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memcpy(brand_string + 32, cpu_id, sizeof(cpu_id));
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}
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if (max_ex_fn >= 0x80000001) {
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// Check for more features.
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__cpuid(cpu_id, 0x80000001);
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if (cpu_id[2] & 1) bLAHFSAHF64 = true;
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if ((cpu_id[3] >> 29) & 1) bLongMode = true;
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}
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num_cores = (logical_cpu_count == 0) ? 1 : logical_cpu_count;
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if (max_ex_fn >= 0x80000008) {
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// Get number of cores. This is a bit complicated. Following AMD manual here.
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__cpuid(cpu_id, 0x80000008);
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int apic_id_core_id_size = (cpu_id[2] >> 12) & 0xF;
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if (apic_id_core_id_size == 0) {
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if (ht) {
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// New mechanism for modern Intel CPUs.
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if (vendor == VENDOR_INTEL) {
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__cpuid(cpu_id, 0x00000004);
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int cores_x_package = ((cpu_id[0] >> 26) & 0x3F) + 1;
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HTT = (cores_x_package < logical_cpu_count);
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cores_x_package = ((logical_cpu_count % cores_x_package) == 0) ? cores_x_package : 1;
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num_cores = (cores_x_package > 1) ? cores_x_package : num_cores;
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logical_cpu_count /= cores_x_package;
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}
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}
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} else {
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// Use AMD's new method.
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num_cores = (cpu_id[2] & 0xFF) + 1;
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}
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}
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}
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// Turn the cpu info into a string we can show
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std::string CPUInfo::Summarize()
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{
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std::string sum(cpu_string);
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if (bSSE) sum += ", SSE";
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if (bSSE2)
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{
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sum += ", SSE2";
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if (!bFlushToZero)
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sum += " (but not DAZ!)";
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}
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if (bSSE3) sum += ", SSE3";
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if (bSSSE3) sum += ", SSSE3";
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if (bSSE4_1) sum += ", SSE4.1";
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if (bSSE4_2) sum += ", SSE4.2";
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if (HTT) sum += ", HTT";
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if (bAVX) sum += ", AVX";
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if (bFMA) sum += ", FMA";
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if (bAES) sum += ", AES";
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if (bLongMode) sum += ", 64-bit support";
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return sum;
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}
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bool CPUInfo::IsUnsafe()
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{
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return !bFlushToZero;
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}
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