2015-10-08 11:03:14 +02:00
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.include "asm/rom_header.s"
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2015-10-05 15:03:59 +02:00
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_080000C0:
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2015-10-10 17:37:51 +02:00
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.4byte 0
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2015-10-05 15:03:59 +02:00
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_080000C4:
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.2byte 0
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2015-10-05 15:03:59 +02:00
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_080000C6:
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.2byte 0
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_080000C8:
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2015-10-10 17:37:51 +02:00
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.4byte 0
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2015-10-05 15:03:59 +02:00
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.incbin "base_emerald.gba", 0xCC, 0x204 - 0xCC
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arm_func_start Init
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Init:
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mov r0, PSR_IRQ_MODE
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msr cpsr_cf, r0
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ldr sp, sp_irq
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mov r0, PSR_SYS_MODE
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msr cpsr_cf, r0
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ldr sp, sp_sys
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ldr r1, =INTR_VECTOR
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adr r0, InterruptMain
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str r0, [r1]
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ldr r1, =Main + 1
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mov lr, pc
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bx r1
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b Init
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.align 2, 0
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sp_sys: .4byte IWRAM_END - 0x1c0
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sp_irq: .4byte IWRAM_END - 0x60
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.pool
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arm_func_end Init
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arm_func_start InterruptMain
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InterruptMain:
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2015-10-10 19:06:17 +02:00
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mov r3, REG_BASE
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2015-10-05 15:03:59 +02:00
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add r3, r3, 0x200
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2015-10-10 19:06:17 +02:00
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ldr r2, [r3, OFFSET_REG_IE - 0x200]
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ldrh r1, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:03:59 +02:00
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mrs r0, spsr
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stmdb sp!, {r0-r3,lr}
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mov r0, 0
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2015-10-10 19:06:17 +02:00
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strh r0, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:03:59 +02:00
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and r1, r2, r2, lsr 16
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mov r12, 0
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_VCOUNT
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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mov r0, 0x1
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2015-10-10 19:06:17 +02:00
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strh r0, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_SERIAL
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER3
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_HBLANK
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_VBLANK
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER0
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER1
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER2
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA0
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA1
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA2
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA3
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_KEYPAD
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2015-10-10 19:06:17 +02:00
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bne @foundInterrupt
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_GAMEPAK
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2015-10-10 19:06:17 +02:00
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strbne r0, [r3, OFFSET_REG_SOUNDCNT_X - 0x200]
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@loop:
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bne @loop
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@foundInterrupt:
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strh r0, [r3, OFFSET_REG_IF - 0x200]
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2015-10-05 15:03:59 +02:00
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bic r2, r2, r0
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ldr r0, =0x03007868
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ldr r0, [r0]
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ldrb r0, [r0, 0xA]
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mov r1, 0x8
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mov r0, r1, lsl r0
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2015-10-05 15:53:39 +02:00
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orr r0, r0, INTR_FLAG_GAMEPAK
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orr r1, r0, INTR_FLAG_SERIAL | INTR_FLAG_TIMER3 | INTR_FLAG_VCOUNT | INTR_FLAG_HBLANK
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2015-10-05 15:03:59 +02:00
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and r1, r1, r2
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2015-10-10 19:06:17 +02:00
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strh r1, [r3, OFFSET_REG_IE - 0x200]
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2015-10-05 15:03:59 +02:00
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mrs r3, cpsr
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2015-10-05 15:53:39 +02:00
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bic r3, r3, PSR_I_BIT | PSR_F_BIT | PSR_MODE_MASK
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orr r3, r3, PSR_SYS_MODE
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2015-10-05 15:03:59 +02:00
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msr cpsr_cf, r3
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ldr r1, =0x03002710
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add r1, r1, r12
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ldr r0, [r1]
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stmdb sp!, {lr}
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add lr, pc, 0
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bx r0
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ldmia sp!, {lr}
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mrs r3, cpsr
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2015-10-05 15:53:39 +02:00
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bic r3, r3, PSR_I_BIT | PSR_F_BIT | PSR_MODE_MASK
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orr r3, r3, PSR_I_BIT | PSR_IRQ_MODE
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2015-10-05 15:03:59 +02:00
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msr cpsr_cf, r3
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ldmia sp!, {r0-r3,lr}
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2015-10-10 19:06:17 +02:00
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strh r2, [r3, OFFSET_REG_IE - 0x200]
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strh r1, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:03:59 +02:00
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msr spsr_cf, r0
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bx lr
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.pool
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arm_func_end InterruptMain
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