reorganize headers and add CpuFill macros

This commit is contained in:
YamaArashi 2016-01-08 12:49:23 -08:00
parent b06f500539
commit bc10815b94
6 changed files with 49 additions and 33 deletions

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@ -1,5 +1,5 @@
#ifndef GUARD_IO_REGS_H
#define GUARD_IO_REGS_H
#ifndef GUARD_GBA_IO_REG_H
#define GUARD_GBA_IO_REG_H
#define REG_BASE 0x4000000 // I/O register base address
@ -385,4 +385,4 @@
#define INTR_FLAG_KEYPAD (1 << 12)
#define INTR_FLAG_GAMEPAK (1 << 13)
#endif // GUARD_IO_REGS_H
#endif // GUARD_GBA_IO_REG_H

15
include/gba/macro.h Normal file
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@ -0,0 +1,15 @@
#ifndef GUARD_GBA_MACRO_H
#define GUARD_GBA_MACRO_H
#define CPU_FILL(dest, value, size, bit) \
do { \
vu##bit tmp = (vu##bit)(value); \
CpuSet((void *)&tmp, \
dest, \
CPU_SET_##bit##BIT | CPU_SET_SRC_FIXED | ((size)/(bit/8) & 0x1FFFFF)); \
} while (0)
#define CpuFill16(dest, value, size) CPU_FILL(dest, value, size, 16)
#define CpuFill32(dest, value, size) CPU_FILL(dest, value, size, 32)
#endif // GUARD_GBA_MACRO_H

10
include/gba/syscall.h Normal file
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@ -0,0 +1,10 @@
#ifndef GUARD_GBA_SYSCALL_H
#define GUARD_GBA_SYSCALL_H
#define CPU_SET_SRC_FIXED 0x01000000
#define CPU_SET_16BIT 0x00000000
#define CPU_SET_32BIT 0x04000000
extern void CpuSet(void *src, void *dest, u32 controlData);
#endif // GUARD_GBA_SYSCALL_H

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@ -27,11 +27,8 @@ typedef u32 bool32;
#define TRUE 1
#define FALSE 0
#include "io_regs.h"
#define CPU_SET_SRC_FIX (1 << 24)
#define CPU_SET_32BIT (1 << 26)
extern void CpuSet(void *src, void *dest, u32 controlData);
#include "gba/io_reg.h"
#include "gba/syscall.h"
#include "gba/macro.h"
#endif // GUARD_GLOBAL_H

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@ -1,14 +1,14 @@
#include "global.h"
#define REG_BUFFER_SIZE 0x60
#define GPU_REG_BUF_SIZE 0x60
#define REG_BUFFER(offset) (*(u16 *)(&gGpuRegBuffer[offset]))
#define GPU_REG_BUF(offset) (*(u16 *)(&gGpuRegBuffer[offset]))
#define GPU_REG(offset) (*(vu16 *)(REG_BASE + offset))
#define EMPTY_SLOT 0xFF
extern u8 gGpuRegBuffer[REG_BUFFER_SIZE];
extern u8 gGpuRegWaitingList[REG_BUFFER_SIZE];
extern u8 gGpuRegBuffer[GPU_REG_BUF_SIZE];
extern u8 gGpuRegWaitingList[GPU_REG_BUF_SIZE];
extern bool8 gGpuRegBufferLocked;
extern bool8 gShouldSyncRegIE;
extern u16 gRegIE;
@ -21,7 +21,7 @@ void InitGpuRegManager()
{
s32 i;
for (i = 0; i < REG_BUFFER_SIZE; i++) {
for (i = 0; i < GPU_REG_BUF_SIZE; i++) {
gGpuRegBuffer[i] = 0;
gGpuRegWaitingList[i] = EMPTY_SLOT;
}
@ -35,9 +35,9 @@ static void CopyBufferedValueToGpuReg(u8 regOffset)
{
if (regOffset == REG_OFFSET_DISPSTAT) {
REG_DISPSTAT &= ~(DISPSTAT_HBLANK_INTR | DISPSTAT_VBLANK_INTR);
REG_DISPSTAT |= REG_BUFFER(REG_OFFSET_DISPSTAT);
REG_DISPSTAT |= GPU_REG_BUF(REG_OFFSET_DISPSTAT);
} else {
GPU_REG(regOffset) = REG_BUFFER(regOffset);
GPU_REG(regOffset) = GPU_REG_BUF(regOffset);
}
}
@ -46,7 +46,7 @@ void CopyBufferedValuesToGpuRegs()
if (!gGpuRegBufferLocked) {
s32 i;
for (i = 0; i < REG_BUFFER_SIZE; i++) {
for (i = 0; i < GPU_REG_BUF_SIZE; i++) {
u8 regOffset = gGpuRegWaitingList[i];
if (regOffset == EMPTY_SLOT)
return;
@ -58,11 +58,11 @@ void CopyBufferedValuesToGpuRegs()
void SetGpuReg(u8 regOffset, u16 value)
{
if (regOffset < REG_BUFFER_SIZE)
if (regOffset < GPU_REG_BUF_SIZE)
{
u16 vcount;
REG_BUFFER(regOffset) = value;
GPU_REG_BUF(regOffset) = value;
vcount = REG_VCOUNT;
if ((vcount >= 161 && vcount <= 225)
@ -73,7 +73,7 @@ void SetGpuReg(u8 regOffset, u16 value)
gGpuRegBufferLocked = TRUE;
for (i = 0; i < REG_BUFFER_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
for (i = 0; i < GPU_REG_BUF_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
if (gGpuRegWaitingList[i] == regOffset) {
gGpuRegBufferLocked = FALSE;
return;
@ -88,9 +88,9 @@ void SetGpuReg(u8 regOffset, u16 value)
void SetGpuReg_ForcedBlank(u8 regOffset, u16 value)
{
if (regOffset < REG_BUFFER_SIZE)
if (regOffset < GPU_REG_BUF_SIZE)
{
REG_BUFFER(regOffset) = value;
GPU_REG_BUF(regOffset) = value;
if (REG_DISPCNT & DISPCNT_FORCED_BLANK) {
CopyBufferedValueToGpuReg(regOffset);
@ -99,7 +99,7 @@ void SetGpuReg_ForcedBlank(u8 regOffset, u16 value)
gGpuRegBufferLocked = TRUE;
for (i = 0; i < REG_BUFFER_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
for (i = 0; i < GPU_REG_BUF_SIZE && gGpuRegWaitingList[i] != EMPTY_SLOT; i++) {
if (gGpuRegWaitingList[i] == regOffset) {
gGpuRegBufferLocked = FALSE;
return;
@ -120,18 +120,18 @@ u16 GetGpuReg(u8 regOffset)
if (regOffset == REG_OFFSET_VCOUNT)
return REG_VCOUNT;
return REG_BUFFER(regOffset);
return GPU_REG_BUF(regOffset);
}
void SetGpuRegBits(u8 regOffset, u16 mask)
{
u16 regValue = REG_BUFFER(regOffset);
u16 regValue = GPU_REG_BUF(regOffset);
SetGpuReg(regOffset, regValue | mask);
}
void ClearGpuRegBits(u8 regOffset, u16 mask)
{
u16 regValue = REG_BUFFER(regOffset);
u16 regValue = GPU_REG_BUF(regOffset);
SetGpuReg(regOffset, regValue & ~mask);
}

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@ -132,16 +132,10 @@ void *AllocZeroedInternal(void *heapStart, u32 size)
void *mem = AllocInternal(heapStart, size);
if (mem != NULL) {
u32 zero;
u32 sizeInWords;
if (size & 3)
size = 4 * ((size / 4) + 1);
zero = 0;
sizeInWords = (size << 9) >> 11;
CpuSet(&zero, mem, CPU_SET_32BIT | CPU_SET_SRC_FIX | sizeInWords);
CpuFill32(mem, 0, size);
}
return mem;