2016-11-01 16:29:13 +01:00
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.include "constants/gba_constants.inc"
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2016-09-03 08:11:29 +02:00
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.syntax unified
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.global Start
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.text
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.arm
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Start: @ 8000000
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2015-11-27 10:33:50 +01:00
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b Init
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2016-11-01 16:29:13 +01:00
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.include "asm/rom_header.inc"
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2015-10-05 15:03:59 +02:00
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2016-09-03 04:51:16 +02:00
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@ 80000C0
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2016-09-03 08:11:29 +02:00
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.word 0
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2015-10-05 15:03:59 +02:00
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2016-09-03 08:11:29 +02:00
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.global GPIOPortData
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2016-09-03 04:51:16 +02:00
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GPIOPortData: @ 80000C4
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2017-09-18 03:32:32 +02:00
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.2byte 0
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2015-10-05 15:03:59 +02:00
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2016-09-03 08:11:29 +02:00
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.global GPIOPortDirection
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2016-09-03 04:51:16 +02:00
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GPIOPortDirection: @ 80000C6
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2017-09-18 03:32:32 +02:00
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.2byte 0
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2015-10-05 15:03:59 +02:00
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2016-09-03 08:11:29 +02:00
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.global GPIOPortReadEnable
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GPIOPortReadEnable: @ 80000C8
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2017-09-18 03:32:32 +02:00
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.2byte 0
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2015-10-05 15:03:59 +02:00
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2017-09-18 03:32:32 +02:00
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@ 80000CA
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.2byte 0
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@ 80000CC
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.space 0x34
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.4byte 3
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.4byte 2
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.ascii "pokemon emerald version"
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.space 9
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.4byte gMonFrontPicTable
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.4byte gMonBackPicTable
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.4byte gMonPaletteTable
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.4byte gMonShinyPaletteTable
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.4byte gMonIconTable
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.4byte gMonIconPaletteIndices
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.4byte gMonIconPaletteTable
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.4byte gSpeciesNames
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.4byte gMoveNames
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.4byte gDecorations
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.4byte 0x00001270, 0x0000139c, 0x00000018, 0x00000988
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.4byte 0x00003b24, 0x00000046, 0x000008e4, 0x000008ac
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.4byte 0x00000182
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.byte 0x07, 0x0a, 0x0a, 0x0a, 0x0c, 0x0c, 0x06, 0x0c
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.byte 0x06, 0x10, 0x12, 0x0c, 0x0f, 0x0b, 0x01, 0x08
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.4byte 0x0000000c, 0x00000f2c, 0x00003d88, 0x00000234
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.4byte 0x00000238, 0x00000009, 0x0000000a, 0x00000000
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.4byte 0x00000008, 0x00000ca8, 0x00000ca8, 0x000031c7
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.4byte 0x000031b3, 0x00000000
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.4byte gBaseStats
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.4byte gAbilityNames
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.4byte gAbilityDescriptionPointers
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.4byte gItems
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.4byte gBattleMoves
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2017-12-02 21:27:00 +01:00
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.4byte gBallSpriteSheets
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.4byte gBallSpritePalettes
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2017-09-18 03:32:32 +02:00
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.4byte 0x000000a8, 0x00000864, 0x0000089b
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.byte 0x1e, 0x1e, 0x10, 0x40
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.4byte 0x0000322e, 0x00000498, 0x000031a8, 0x000031f8
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.4byte 0x00000034, 0x00000000, 0x00000000
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2015-10-05 15:03:59 +02:00
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2016-09-03 08:11:29 +02:00
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.arm
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.align 2, 0
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.global Init
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2016-09-03 04:51:16 +02:00
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Init: @ 8000204
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2015-10-05 15:03:59 +02:00
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mov r0, PSR_IRQ_MODE
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msr cpsr_cf, r0
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ldr sp, sp_irq
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mov r0, PSR_SYS_MODE
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msr cpsr_cf, r0
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ldr sp, sp_sys
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ldr r1, =INTR_VECTOR
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2017-02-04 01:44:06 +01:00
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adr r0, IntrMain
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2015-10-05 15:03:59 +02:00
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str r0, [r1]
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2017-02-04 01:44:06 +01:00
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ldr r1, =AgbMain + 1
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2015-10-05 15:03:59 +02:00
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mov lr, pc
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bx r1
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b Init
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.align 2, 0
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2016-09-03 08:11:29 +02:00
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sp_sys: .word IWRAM_END - 0x1c0
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sp_irq: .word IWRAM_END - 0x60
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2015-10-05 15:03:59 +02:00
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.pool
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2016-09-03 08:11:29 +02:00
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.arm
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.align 2, 0
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2017-02-04 01:44:06 +01:00
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.global IntrMain
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IntrMain: @ 8000248
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2015-10-10 19:06:17 +02:00
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mov r3, REG_BASE
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2015-10-05 15:03:59 +02:00
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add r3, r3, 0x200
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2015-10-10 19:06:17 +02:00
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ldr r2, [r3, OFFSET_REG_IE - 0x200]
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ldrh r1, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:03:59 +02:00
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mrs r0, spsr
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stmdb sp!, {r0-r3,lr}
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mov r0, 0
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2015-10-10 19:06:17 +02:00
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strh r0, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:03:59 +02:00
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and r1, r2, r2, lsr 16
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mov r12, 0
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_VCOUNT
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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mov r0, 0x1
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2015-10-10 19:06:17 +02:00
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strh r0, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_SERIAL
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER3
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_HBLANK
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_VBLANK
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER0
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER1
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_TIMER2
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA0
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA1
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA2
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_DMA3
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_KEYPAD
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2017-02-04 01:44:06 +01:00
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bne IntrMain_FoundIntr
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2015-10-05 15:03:59 +02:00
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add r12, r12, 0x4
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2015-10-05 15:53:39 +02:00
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ands r0, r1, INTR_FLAG_GAMEPAK
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2015-10-10 19:06:17 +02:00
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strbne r0, [r3, OFFSET_REG_SOUNDCNT_X - 0x200]
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2017-02-04 01:44:06 +01:00
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bne . @ spin
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IntrMain_FoundIntr:
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2015-10-10 19:06:17 +02:00
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strh r0, [r3, OFFSET_REG_IF - 0x200]
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2015-10-05 15:03:59 +02:00
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bic r2, r2, r0
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2017-09-07 08:51:59 +02:00
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ldr r0, =gRfuState
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2015-10-05 15:03:59 +02:00
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ldr r0, [r0]
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ldrb r0, [r0, 0xA]
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mov r1, 0x8
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mov r0, r1, lsl r0
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2015-10-05 15:53:39 +02:00
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orr r0, r0, INTR_FLAG_GAMEPAK
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orr r1, r0, INTR_FLAG_SERIAL | INTR_FLAG_TIMER3 | INTR_FLAG_VCOUNT | INTR_FLAG_HBLANK
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2015-10-05 15:03:59 +02:00
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and r1, r1, r2
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2015-10-10 19:06:17 +02:00
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strh r1, [r3, OFFSET_REG_IE - 0x200]
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2015-10-05 15:03:59 +02:00
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mrs r3, cpsr
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2015-10-05 15:53:39 +02:00
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bic r3, r3, PSR_I_BIT | PSR_F_BIT | PSR_MODE_MASK
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orr r3, r3, PSR_SYS_MODE
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2015-10-05 15:03:59 +02:00
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msr cpsr_cf, r3
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2017-02-15 22:25:21 +01:00
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ldr r1, =gIntrTable
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2015-10-05 15:03:59 +02:00
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add r1, r1, r12
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ldr r0, [r1]
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stmdb sp!, {lr}
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2017-02-04 01:44:06 +01:00
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adr lr, IntrMain_RetAddr
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2015-10-05 15:03:59 +02:00
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bx r0
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2017-02-04 01:44:06 +01:00
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IntrMain_RetAddr:
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2015-10-05 15:03:59 +02:00
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ldmia sp!, {lr}
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mrs r3, cpsr
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2015-10-05 15:53:39 +02:00
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bic r3, r3, PSR_I_BIT | PSR_F_BIT | PSR_MODE_MASK
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orr r3, r3, PSR_I_BIT | PSR_IRQ_MODE
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2015-10-05 15:03:59 +02:00
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msr cpsr_cf, r3
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ldmia sp!, {r0-r3,lr}
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2015-10-10 19:06:17 +02:00
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strh r2, [r3, OFFSET_REG_IE - 0x200]
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strh r1, [r3, OFFSET_REG_IME - 0x200]
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2015-10-05 15:03:59 +02:00
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msr spsr_cf, r0
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bx lr
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.pool
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2016-09-03 08:11:29 +02:00
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.align 2, 0 @ Don't pad with nop.
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